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soc: esp32: replace hard-coded addresses and sizes by DT macros

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Replaces hard-coded memory addresses and sizes with macros that retrieve
such values from the device tree.

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
This commit is contained in:
Marcio Ribeiro 2024-10-23 16:42:55 -03:00 • committed by Benjamin Cabé
commit 7f13961884
6 changed files with 35 additions and 34 deletions
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21
soc/espressif/esp32/memory.h
View file

@ -5,22 +5,22 @@
#pragma once
/* SRAM0 (192kB) instruction cache+memory */
#define SRAM0_IRAM_START 0x40070000
#define SRAM0_IRAM_START DT_REG_ADDR(DT_NODELABEL(sram0))
#define SRAM0_CACHE_SIZE 0x10000
#define SRAM0_SIZE 0x30000
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
/* SRAM1 (128kB) instruction/data memory */
#define SRAM1_IRAM_START 0x400a0000
#define SRAM1_DRAM_START 0x3ffe0000
#define SRAM1_SIZE 0x20000
#define SRAM1_DRAM_END (SRAM1_DRAM_START + SRAM1_SIZE)
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))
#define SRAM1_DRAM_END (SRAM1_DRAM_START + SRAM1_SIZE)
#define SRAM1_DRAM_PROAPP_PRIV_SIZE 0x8000
#define SRAM1_DRAM_USER_START 0x3ffe8000
#define SRAM1_USER_SIZE (0x40000000 - SRAM1_DRAM_USER_START)
#define SRAM1_DRAM_USER_START (SRAM1_DRAM_START + SRAM1_DRAM_PROAPP_PRIV_SIZE)
#define SRAM1_USER_SIZE (0x40000000 - SRAM1_DRAM_USER_START)
/* SRAM2 (200kB) data memory */
#define SRAM2_DRAM_START 0x3ffae000
#define SRAM2_DRAM_SIZE 0x32000
#define SRAM2_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram2))
#define SRAM2_DRAM_SIZE DT_REG_SIZE(DT_NODELABEL(sram2))
#define SRAM2_DRAM_SHM_SIZE 0x2000
#define SRAM2_DRAM_END (SRAM2_DRAM_START + SRAM2_DRAM_SIZE)
#define SRAM2_DRAM_USER_START (SRAM2_DRAM_START + SRAM2_DRAM_SHM_SIZE)
@ -46,6 +46,7 @@
/* Convert IRAM address to its DRAM counterpart in SRAM1 memory */
#define SRAM1_IRAM_DRAM_CALC(addr_iram) ((addr_iram > SRAM1_IRAM_START) ? \
(SRAM1_SIZE - (addr_iram - SRAM1_IRAM_START) + SRAM1_DRAM_START) : (SRAM1_DRAM_END))
/* Convert DRAM address to its IRAM counterpart in SRAM1 memory */
#define SRAM1_DRAM_IRAM_CALC(addr_dram) \
(SRAM1_SIZE - (addr_dram - SRAM1_DRAM_START) + SRAM1_IRAM_START)

10
soc/espressif/esp32c2/memory.h
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@ -5,13 +5,13 @@
#pragma once
/* SRAM0 (16kB) memory */
#define SRAM0_IRAM_START 0x4037c000
#define SRAM0_SIZE 0x4000
#define SRAM0_IRAM_START DT_REG_ADDR(DT_NODELABEL(sram0))
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
/* SRAM1 (256kB) memory */
#define SRAM1_DRAM_START 0x3fca0000
#define SRAM1_IRAM_START 0x40380000
#define SRAM1_SIZE 0x40000
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))
/* ICache size is fixed to 16KB on ESP32-C2 */
#define ICACHE_SIZE SRAM0_SIZE

10
soc/espressif/esp32c3/memory.h
View file

@ -5,12 +5,12 @@
#pragma once
/* SRAM0 (16kB) memory */
#define SRAM0_IRAM_START 0x4037c000
#define SRAM0_SIZE 0x4000
#define SRAM0_IRAM_START DT_REG_ADDR(DT_NODELABEL(sram0))
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
/* SRAM1 (384kB) memory */
#define SRAM1_DRAM_START 0x3fc80000
#define SRAM1_IRAM_START 0x40380000
#define SRAM1_SIZE 0x60000
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))
/* ICache size is fixed to 16KB on ESP32-C3 */
#define ICACHE_SIZE SRAM0_SIZE

12
soc/espressif/esp32c6/memory.h
View file

@ -5,13 +5,13 @@
#pragma once
/* LP-SRAM (16kB) memory */
#define LPSRAM_IRAM_START 0x50000000
#define LPSRAM_SIZE 0x4000
#define LPSRAM_IRAM_START DT_REG_ADDR(DT_NODELABEL(sramlp))
#define LPSRAM_SIZE DT_REG_SIZE(DT_NODELABEL(sramlp))
/* HP-SRAM (512kB) memory */
#define HPSRAM_START 0x40800000
#define HPSRAM_SIZE 0x80000
#define HPSRAM_DRAM_START 0x40800000
#define HPSRAM_IRAM_START 0x40800000
#define HPSRAM_START DT_REG_ADDR(DT_NODELABEL(sramhp))
#define HPSRAM_SIZE DT_REG_SIZE(DT_NODELABEL(sramhp))
#define HPSRAM_DRAM_START HPSRAM_START
#define HPSRAM_IRAM_START HPSRAM_START
/* ICache size is fixed to 32KB on ESP32-C6 */
#define ICACHE_SIZE 0x8000

4
soc/espressif/esp32s2/memory.h
View file

@ -7,8 +7,8 @@
/* SRAM0 (32k) with adjacted SRAM1 (288k)
* Ibus and Dbus address space
*/
#define SRAM_IRAM_START 0x40020000
#define SRAM_DRAM_START 0x3ffb0000
#define SRAM_IRAM_START (SRAM_DRAM_START + IRAM_DRAM_OFFSET)
#define SRAM_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram0))
#define SRAM_CACHE_SIZE (CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE + CONFIG_ESP32S2_DATA_CACHE_SIZE)
/** Simplified memory map for the bootloader.

12
soc/espressif/esp32s3/memory.h
View file

@ -7,14 +7,14 @@
/* SRAM0 (32k), SRAM1 (416k), SRAM2 (64k) memories
* Ibus and Dbus address space
*/
#define SRAM0_IRAM_START 0x40370000
#define SRAM0_SIZE 0x8000
#define SRAM1_DRAM_START 0x3fc88000
#define SRAM1_IRAM_START 0x40378000
#define SRAM0_IRAM_START DT_REG_ADDR(DT_NODELABEL(sram0))
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM_USER_IRAM_START (SRAM0_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM2_DRAM_START 0x3fcf0000
#define SRAM2_SIZE 0x10000
#define SRAM2_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram2))
#define SRAM2_SIZE DT_REG_SIZE(DT_NODELABEL(sram2))
#define SRAM2_USER_DRAM_START (SRAM2_DRAM_START + CONFIG_ESP32S3_DATA_CACHE_SIZE)
#define SRAM2_USER_DRAM_SIZE (SRAM2_SIZE - CONFIG_ESP32S3_DATA_CACHE_SIZE)