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soc: arm: nxp_imx: support enet2 interface on RT106x series

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This patch enables the PLL clock output and PLL ref clock
for second ethernet module in NXP's i.MxRT106x SoCs

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
This commit is contained in:
Sumit Batra 2023-05-17 05:37:54 +05:30 • committed by David Leach
commit 7dce14632d
2 changed files with 12 additions and 1 deletions
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6
drivers/ethernet/eth_mcux.c
View file

@ -3,6 +3,7 @@
* Copyright (c) 2016-2017 ARM Ltd
* Copyright (c) 2016 Linaro Ltd
* Copyright (c) 2018 Intel Corporation
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -1021,7 +1022,12 @@ static void eth_mcux_init(const struct device *dev)
context->phy_handle->ops = &phyksz8081_ops;
#if defined(CONFIG_SOC_SERIES_IMX_RT10XX)
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet), okay)
sys_clock = CLOCK_GetFreq(kCLOCK_IpgClk);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet2), okay)
sys_clock = CLOCK_GetFreq(kCLOCK_EnetPll1Clk);
#endif
#elif defined(CONFIG_SOC_SERIES_IMX_RT11XX)
sys_clock = CLOCK_GetRootClockFreq(kCLOCK_Root_Bus);
#else

7
soc/arm/nxp_imx/rt/soc_rt10xx.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020 NXP
* Copyright 2017-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -54,8 +54,13 @@ const clock_enet_pll_config_t ethPllConfig = {
.enableClkOutput500M = true,
#endif
#ifdef CONFIG_ETH_MCUX
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet), okay)
.enableClkOutput = true,
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet2), okay)
.enableClkOutput1 = true,
#endif
#endif
#if defined(CONFIG_PTP_CLOCK_MCUX)
.enableClkOutput25M = true,
#else