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yamllint: fix all yamllint line-length errors

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Fix all line-length errors detected by yamllint:

yamllint -f parsable -c .yamllint $( find -regex '.*\.y[a]*ml' ) | \
  grep '(line-length)'

Using a limit is set to 100 columns, not touching the commandlines in
GitHub workflows (at least for now).

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit is contained in:
Fabio Baltieri 2023-01-03 13:08:30 +00:00 • committed by Stephanos Ioannidis
commit 7db1d17ee3
59 changed files with 327 additions and 175 deletions
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42
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/testcase.yaml
View file

@ -9,27 +9,32 @@ common:
tags: clock-control
tests:
drivers.stm32_clock_configuration.common_core.l4_l5.sysclksrc_pll_48_msi_4:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_48_msi_4.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_48_msi_4.overlay"
platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk
integration_platforms:
- disco_l475_iot1
drivers.stm32_clock_configuration.common_core.l4_l5.sysclksrc_pll_64_hsi_16:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_64_hsi_16.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_64_hsi_16.overlay"
platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk
integration_platforms:
- disco_l475_iot1
drivers.stm32_clock_configuration.common_core.sysclksrc_hsi_16:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hsi_16.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hsi_16.overlay"
platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk nucleo_wb55rg nucleo_wl55jc
integration_platforms:
- disco_l475_iot1
drivers.stm32_clock_configuration.common_core.sysclksrc_msi_48:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/msi_range11.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/msi_range11.overlay"
platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk nucleo_wl55jc nucleo_wb55rg
integration_platforms:
- disco_l475_iot1
drivers.stm32_clock_configuration.common_core.l4_l5.sysclksrc_hse_8.fixup:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hse_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hse_8.overlay"
platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk
harness: ztest
harness_config:
@ -37,7 +42,8 @@ tests:
integration_platforms:
- disco_l475_iot1
drivers.stm32_clock_configuration.common_core.l4_l5.sysclksrc_pll_64_hse_8.fixup:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_64_hse_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_64_hse_8.overlay"
platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk
harness: ztest
harness_config:
@ -86,7 +92,8 @@ tests:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hse_24.overlay"
platform_allow: nucleo_g474re
drivers.stm32_clock_configuration.common_core.l0_l1.sysclksrc_hse_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hse_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hse_8.overlay"
platform_allow: nucleo_l152re nucleo_l073rz
integration_platforms:
- nucleo_l152re
@ -151,12 +158,14 @@ tests:
integration_platforms:
- nucleo_f091rc
drivers.stm32_clock_configuration.common_core.f0_f3.sysclksrc_pll_32_hsi_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f0_f3_pll_32_hsi_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f0_f3_pll_32_hsi_8.overlay"
platform_allow: nucleo_f091rc stm32f3_disco
integration_platforms:
- nucleo_f091rc
drivers.stm32_clock_configuration.common_core.f0_f3.sysclksrc_pll_32_hse_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f0_f3_pll_32_hse_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f0_f3_pll_32_hse_8.overlay"
platform_allow: nucleo_f091rc stm32f3_disco
integration_platforms:
- nucleo_f091rc
@ -171,12 +180,14 @@ tests:
integration_platforms:
- nucleo_f103rb
drivers.stm32_clock_configuration.common_core.f1.sysclksrc_pll_64_hsi_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f1_pll_64_hsi_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f1_pll_64_hsi_8.overlay"
platform_allow: nucleo_f103rb
integration_platforms:
- nucleo_f103rb
drivers.stm32_clock_configuration.common_core.f1.sysclksrc_pll_64_hse_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f1_pll_64_hse_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f1_pll_64_hse_8.overlay"
platform_allow: nucleo_f103rb
integration_platforms:
- nucleo_f103rb
@ -191,17 +202,20 @@ tests:
integration_platforms:
- nucleo_f207zg
drivers.stm32_clock_configuration.common_core.f2_f4_f7.sysclksrc_pll_64_hsi_16:
extra_args: DTC_OVERLAY_FILE="boards/clear_f2_f4_f7_clocks.overlay;boards/f2_f4_f7_pll_64_hsi_16.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f2_f4_f7_clocks.overlay;boards/f2_f4_f7_pll_64_hsi_16.overlay"
platform_allow: nucleo_f207zg nucleo_f429zi nucleo_f446re nucleo_f746zg
integration_platforms:
- nucleo_f207zg
drivers.stm32_clock_configuration.common_core.f2_f4_f7.sysclksrc_pll_64_hse_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f2_f4_f7_clocks.overlay;boards/f2_f4_f7_pll_64_hse_8.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f2_f4_f7_clocks.overlay;boards/f2_f4_f7_pll_64_hse_8.overlay"
platform_allow: nucleo_f207zg nucleo_f429zi nucleo_f446re nucleo_f746zg
integration_platforms:
- nucleo_f207zg
drivers.stm32_clock_configuration.common_core.f2_f4_f7.sysclksrc_pll_100_hsi_16_ahb2:
extra_args: DTC_OVERLAY_FILE="boards/clear_f2_f4_f7_clocks.overlay;boards/f2_f4_f7_pll_100_hsi_16_ahb_2.overlay"
extra_args:
DTC_OVERLAY_FILE="boards/clear_f2_f4_f7_clocks.overlay;boards/f2_f4_f7_pll_100_hsi_16_ahb_2.overlay"
platform_allow: nucleo_f207zg nucleo_f429zi nucleo_f446re nucleo_f746zg
integration_platforms:
- nucleo_f207zg