From 7d8d4fd0cd09ba673a9480cbda28e697286b371c Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Fri, 27 Aug 2021 14:07:30 +0800 Subject: [PATCH] boards: arc: add a nsim_hs_mpuv6 board simulator We add support of mpu v6 therefore it is needed to have a board to validate that feature. This commit add a new HS nsim simulator which supports mpu v6. Signed-off-by: Yuguo Zou --- boards/arc/nsim/nsim_hs_mpuv6.dts | 25 ++++++++++ boards/arc/nsim/nsim_hs_mpuv6.yaml | 13 ++++++ boards/arc/nsim/nsim_hs_mpuv6_defconfig | 16 +++++++ boards/arc/nsim/support/mdb_hs_mpuv6.args | 45 ++++++++++++++++++ boards/arc/nsim/support/nsim_hs_mpuv6.props | 48 ++++++++++++++++++++ soc/arc/snps_nsim/CMakeLists.txt | 7 +++ soc/arc/snps_nsim/Kconfig | 5 ++ soc/arc/snps_nsim/Kconfig.defconfig | 1 + soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6 | 39 ++++++++++++++++ 9 files changed, 199 insertions(+) create mode 100644 boards/arc/nsim/nsim_hs_mpuv6.dts create mode 100644 boards/arc/nsim/nsim_hs_mpuv6.yaml create mode 100644 boards/arc/nsim/nsim_hs_mpuv6_defconfig create mode 100644 boards/arc/nsim/support/mdb_hs_mpuv6.args create mode 100644 boards/arc/nsim/support/nsim_hs_mpuv6.props create mode 100644 soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6 diff --git a/boards/arc/nsim/nsim_hs_mpuv6.dts b/boards/arc/nsim/nsim_hs_mpuv6.dts new file mode 100644 index 00000000000..c27b2253e8d --- /dev/null +++ b/boards/arc/nsim/nsim_hs_mpuv6.dts @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2021, Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "nsim.dtsi" + +/ { + model = "snps,nsim_hs"; + compatible = "snps,nsim_hs"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "snps,archs"; + reg = <0>; + }; + }; +}; diff --git a/boards/arc/nsim/nsim_hs_mpuv6.yaml b/boards/arc/nsim/nsim_hs_mpuv6.yaml new file mode 100644 index 00000000000..906a3ea1afc --- /dev/null +++ b/boards/arc/nsim/nsim_hs_mpuv6.yaml @@ -0,0 +1,13 @@ +identifier: nsim_hs_mpuv6 +name: HS (with MPU v6) nSIM simulator +type: mcu +simulation: nsim +arch: arc +toolchain: + - zephyr + - arcmwdt +testing: + default: true + ignore_tags: + - net + - bluetooth diff --git a/boards/arc/nsim/nsim_hs_mpuv6_defconfig b/boards/arc/nsim/nsim_hs_mpuv6_defconfig new file mode 100644 index 00000000000..6ad394c2c5a --- /dev/null +++ b/boards/arc/nsim/nsim_hs_mpuv6_defconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_NSIM=y +CONFIG_SOC_NSIM_HS_MPUV6=y +CONFIG_BOARD_NSIM=y +CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 +CONFIG_XIP=n +CONFIG_BUILD_OUTPUT_BIN=n +CONFIG_PRINTK=y +CONFIG_ARCV2_INTERRUPT_UNIT=y +CONFIG_ARCV2_TIMER=y +CONFIG_ARC_MPU_ENABLE=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_ARC_EXCEPTION_DEBUG=y diff --git a/boards/arc/nsim/support/mdb_hs_mpuv6.args b/boards/arc/nsim/support/mdb_hs_mpuv6.args new file mode 100644 index 00000000000..a47fdf2718b --- /dev/null +++ b/boards/arc/nsim/support/mdb_hs_mpuv6.args @@ -0,0 +1,45 @@ + -arcv2hs + -core2 + -arcnum=3 + -rgf_num_banks=2 + -rgf_banked_regs=32 + -rgf_num_wr_ports=2 + -Xatomic + -Xll64 + -Xunaligned + -Xcode_density + -Xdiv_rem=radix4 + -Xswap + -Xbitscan + -Xmpy_option=qmpyh + -mpuv6 + -mpu_regions=32 + -Xshift_assist + -Xbarrel_shifter + -Xfpud_div + -Xfpu_mac + -Xtimer0 + -Xtimer0_level=1 + -Xtimer1 + -Xtimer1_level=0 + -Xrtc + -action_points=8 + -Xstack_check + -interrupts=72 + -interrupt_priorities=2 + -ext_interrupts=70 + -firq + -interrupt_base=0x0 + -dcache=65536,64,2,a + -dcache_feature=2 + -dcache_uncached_region + -dcache_mem_cycles=2 + -icache=65536,64,4,a + -icache_feature=2 + -dccm_size=0x40000 + -dccm_base=0x80000000 + -dccm_mem_cycles=2 + -iccm0_size=0x40000 + -iccm0_base=0x70000000 + -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 + -noprofile diff --git a/boards/arc/nsim/support/nsim_hs_mpuv6.props b/boards/arc/nsim/support/nsim_hs_mpuv6.props new file mode 100644 index 00000000000..62050e83cb4 --- /dev/null +++ b/boards/arc/nsim/support/nsim_hs_mpuv6.props @@ -0,0 +1,48 @@ + nsim_isa_family=av2hs + nsim_isa_core=2 + arcver=0x52 + nsim_isa_rgf_num_banks=2 + nsim_isa_rgf_banked_regs=32 + nsim_isa_rgf_num_regs=32 + nsim_isa_rgf_num_wr_ports=2 + nsim_isa_big_endian=0 + nsim_isa_lpc_size=32 + nsim_isa_pc_size=32 + nsim_isa_addr_size=32 + nsim_isa_atomic_option=1 + nsim_isa_ll64_option=1 + nsim_isa_unaligned_option=1 + nsim_isa_code_density_option=2 + nsim_isa_div_rem_option=2 + nsim_isa_swap_option=1 + nsim_isa_bitscan_option=1 + nsim_isa_mpy_option=9 + nsim_isa_shift_option=3 + mpu_regions=32 + mpu_version=6 + nsim_isa_fpud_div_option=1 + nsim_isa_fpu_mac_option=1 + nsim_isa_enable_timer_0=1 + nsim_isa_timer_0_int_level=1 + nsim_isa_enable_timer_1=1 + nsim_isa_timer_1_int_level=0 + nsim_isa_rtc_option=1 + nsim_isa_num_actionpoints=8 + nsim_isa_stack_checking=1 + nsim_isa_number_of_interrupts=72 + nsim_isa_number_of_levels=2 + nsim_isa_number_of_external_interrupts=70 + nsim_isa_fast_irq=1 + nsim_isa_intvbase_preset=0x0 + dcache=65536,64,2,a + nsim_isa_dc_feature_level=2 + nsim_isa_dc_uncached_region=1 + nsim_isa_dc_mem_cycles=2 + icache=65536,64,4,a + nsim_isa_ic_feature_level=2 + dccm_size=0x40000 + dccm_base=0x80000000 + nsim_isa_dccm_mem_cycles=2 + iccm0_size=0x40000 + iccm0_base=0x70000000 + nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 diff --git a/soc/arc/snps_nsim/CMakeLists.txt b/soc/arc/snps_nsim/CMakeLists.txt index dbfdabfed0d..7dda794dd09 100644 --- a/soc/arc/snps_nsim/CMakeLists.txt +++ b/soc/arc/snps_nsim/CMakeLists.txt @@ -44,6 +44,13 @@ else() -Xtimer0 -Xtimer1) zephyr_ld_option_ifdef(CONFIG_SOC_NSIM_HS_SMP -Hlib=hs38_full) + + zephyr_compile_options_ifdef(CONFIG_SOC_NSIM_HS_MPUV6 -arcv2hs -core2 -Xatomic + -Xunaligned -Xcode_density -Xswap -Xbitscan + -Xmpy_option=qmpyh -Xshift_assist -Xbarrel_shifter + -Xtimer0 -Xtimer1) + + zephyr_ld_option_ifdef(CONFIG_SOC_NSIM_HS_MPUV6 -Hlib=hs38_full) endif() zephyr_sources( diff --git a/soc/arc/snps_nsim/Kconfig b/soc/arc/snps_nsim/Kconfig index 2bbfc7e618c..8235d8d29fa 100644 --- a/soc/arc/snps_nsim/Kconfig +++ b/soc/arc/snps_nsim/Kconfig @@ -29,6 +29,11 @@ config SOC_NSIM_HS_SMP bool "Multi-core Synopsys ARC HS in nSIM" select CPU_HAS_FPU +config SOC_NSIM_HS_MPUV6 + bool "Synopsys ARC HS with MPU v6 in nSIM" + select CPU_HAS_MPU + select CPU_HAS_FPU + config SOC_NSIM_HS6X bool "Synopsys ARC HS6x in nSIM" diff --git a/soc/arc/snps_nsim/Kconfig.defconfig b/soc/arc/snps_nsim/Kconfig.defconfig index f01ba1ddbe9..a14bd763ce5 100644 --- a/soc/arc/snps_nsim/Kconfig.defconfig +++ b/soc/arc/snps_nsim/Kconfig.defconfig @@ -16,5 +16,6 @@ source "soc/arc/snps_nsim/Kconfig.defconfig.hs" source "soc/arc/snps_nsim/Kconfig.defconfig.hs_smp" source "soc/arc/snps_nsim/Kconfig.defconfig.hs6x" source "soc/arc/snps_nsim/Kconfig.defconfig.hs6x_smp" +source "soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6" endif # SOC_NSIM diff --git a/soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6 b/soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6 new file mode 100644 index 00000000000..5dca50e1dd3 --- /dev/null +++ b/soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6 @@ -0,0 +1,39 @@ +# Copyright (c) 2021 Synopsys, Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +if SOC_NSIM_HS_MPUV6 + +config CPU_HS3X + default y + +config NUM_IRQ_PRIO_LEVELS + # This processor supports 16 priority levels: + # 0 for Fast Interrupts (FIRQs) and 1-15 for Regular Interrupts (IRQs). + default 2 + +config NUM_IRQS + # must be > the highest interrupt number used + default 30 + +config ARC_MPU_VER + default 6 + +config MAX_DOMAIN_PARTITIONS + default 32 if USERSPACE + +config RGF_NUM_BANKS + default 2 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 5000000 + +config HARVARD + default y + +config ARC_FIRQ + default y + +config CACHE_MANAGEMENT + default y + +endif # SOC_NSIM_HS_MPUV6