dts: Add information about CPU frequency to the cpu nodes

This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:

- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
  in order to configure USB clock source.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>

boards/arc/iotdk/iotdk.dts

@@ -25,6 +25,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <144000000>;
+};
+
 &uart0 {
 	status = "okay";
 	current-speed = <115200>;

boards/arc/nsim/nsim_em.dts

@@ -12,3 +12,7 @@
 	model = "snps,nsim_em";
 	compatible = "snps,nsim_em";
 };
+
+&cpu0 {
+	clock-frequency = <5000000>;
+};

boards/arc/nsim/nsim_em.dtsi

@@ -13,7 +13,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "snps,arcem";
 			reg = <0>;

boards/arc/nsim/nsim_sem.dts

@@ -12,3 +12,7 @@
 	model = "snps,nsim_sem";
 	compatible = "snps,nsim_sem";
 };
+
+&cpu0 {
+	clock-frequency = <5000000>;
+};

boards/arm/adafruit_feather_m0_basic_proto/adafruit_feather_m0_basic_proto.dts

@@ -34,6 +34,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &sercom0 {
 	status = "okay";
 	compatible = "atmel,sam0-uart";

boards/arm/adafruit_trinket_m0/adafruit_trinket_m0.dts

@@ -41,6 +41,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &sercom0 {
 	status = "okay";
 	compatible = "atmel,sam0-uart";

boards/arm/arduino_due/arduino_due.dts

@@ -23,6 +23,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <84000000>;
+};
+
 &wdog {
 	status = "okay";
 };

boards/arm/arduino_zero/arduino_zero.dts

@@ -43,6 +43,10 @@
 
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &sercom0 {
 	status = "okay";
 	compatible = "atmel,sam0-uart";

boards/arm/atsamd20_xpro/atsamd20_xpro.dts

@@ -40,6 +40,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &sercom0 {
 	status = "okay";
 	compatible = "atmel,sam0-spi";

boards/arm/atsamd21_xpro/atsamd21_xpro.dts

@@ -41,6 +41,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &sercom0 {
 	status = "okay";
 	compatible = "atmel,sam0-uart";

boards/arm/atsamr21_xpro/atsamr21_xpro.dts

@@ -41,6 +41,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &sercom0 {
 	status = "okay";
 	compatible = "atmel,sam0-uart";

boards/arm/efm32hg_slstk3400a/efm32hg_slstk3400a.dts

@@ -54,6 +54,10 @@
 
 };
 
+&cpu0 {
+	clock-frequency = <24000000>;
+};
+
 &usart1 {
 	current-speed = <115200>;
 	location-rx = <GECKO_LOCATION(4) GECKO_PORT_A GECKO_PIN(0)>;

boards/arm/efm32pg_stk3402a/efm32pg_stk3402a.dts

@@ -53,6 +53,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <40000000>;
+};
+
 &usart0 {
 	current-speed = <115200>;
 	location-rx = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(1)>;

boards/arm/efm32wg_stk3800/efm32wg_stk3800.dts

@@ -53,6 +53,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &uart0 {
 	current-speed = <115200>;
 	location-rx = <GECKO_LOCATION(1) GECKO_PORT_E GECKO_PIN(1)>;

boards/arm/efr32_slwstk6061a/efr32_slwstk6061a.dts

@@ -55,6 +55,10 @@
 
 };
 
+&cpu0 {
+	clock-frequency = <38400000>;
+};
+
 &usart0 {
 	current-speed = <115200>;
 	location-rx = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(1)>;

boards/arm/efr32mg_sltb004a/efr32mg_sltb004a.dts

@@ -52,6 +52,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <38400000>;
+};
+
 &usart0 {
 	current-speed = <115200>;
 	location-rx = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(1)>;

boards/arm/frdm_k64f/frdm_k64f.dts

@@ -109,6 +109,10 @@
 
 arduino_serial: &uart3 {};
 
+&cpu0 {
+	clock-frequency = <120000000>;
+};
+
 &adc0 {
 	status = "okay";
 };

boards/arm/frdm_kl25z/frdm_kl25z.dts

@@ -61,6 +61,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &adc0 {
 	status = "okay";
 };

boards/arm/hexiwear_k64/hexiwear_k64.dts

@@ -79,6 +79,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <120000000>;
+};
+
 &adc0 {
 	status = "okay";
 };

boards/arm/lpcxpresso54114/lpcxpresso54114_m0.dts

@@ -21,6 +21,10 @@
 	};
 };
 
+&cpu1 {
+	clock-frequency = <48000000>;
+};
+
 &mailbox0 {
 	status = "okay";
 };

boards/arm/lpcxpresso54114/lpcxpresso54114_m4.dts

@@ -43,6 +43,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &usart0 {
 	status = "okay";
 	current-speed = <115200>;

boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl.dts

@@ -21,6 +21,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &uart0 {
 	status = "okay";
 	current-speed = <115200>;

boards/arm/sam4s_xplained/sam4s_xplained.dts

@@ -49,6 +49,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <120000000>;
+};
+
 &i2c0 {
 	status = "okay";
 };

boards/arm/sam_e70_xplained/sam_e70_xplained.dts

@@ -52,6 +52,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <300000000>;
+};
+
 &adc0 {
 	status = "okay";
 };

boards/arm/usb_kw24d512/usb_kw24d512.dts

@@ -55,6 +55,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
 &adc0 {
 	status = "okay";
 };

boards/arm/v2m_beetle/v2m_beetle.dts

@@ -22,6 +22,7 @@
 
 		cpu@0 {
 			compatible = "arm,cortex-m3";
+			clock-frequency = <24000000>;
 			reg = <0>;
 		};
 	};

boards/xtensa/esp32/esp32.dts

@@ -21,6 +21,14 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <40000000>;
+};
+
+&cpu1 {
+	clock-frequency = <40000000>;
+};
+
 &uart0 {
 	status = "okay";
 	current-speed = <115200>;

boards/xtensa/intel_s1000_crb/intel_s1000_crb.dts

@@ -20,6 +20,14 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <400000000>;
+};
+
+&cpu1 {
+	clock-frequency = <400000000>;
+};
+
 &uart0 {
 	status = "okay";
 	current-speed = <115200>;

boards/xtensa/qemu_xtensa/qemu_xtensa.dts

@@ -16,3 +16,7 @@
 		zephyr,sram = &sram0;
 	};
 };
+
+&cpu0 {
+	clock-frequency = <10000000>;
+};

boards/xtensa/xt-sim/xt-sim.dts

@@ -15,3 +15,7 @@
 		zephyr,sram = &sram0;
 	};
 };
+
+&cpu0 {
+	clock-frequency = <10000000>;
+};

dts/arc/arc_iot.dtsi

@@ -14,7 +14,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "snps,arcem";
 			reg = <0>;

dts/arm/atmel/sam3x.dtsi

@@ -12,7 +12,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m4";
 			reg = <0>;

dts/arm/atmel/sam4s.dtsi

@@ -13,7 +13,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m4";
 			reg = <0>;

dts/arm/atmel/samd.dtsi

@@ -13,7 +13,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m0+";
 			reg = <0>;

dts/arm/atmel/same70.dtsi

@@ -14,7 +14,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m7";
 			reg = <0>;

dts/arm/nxp/nxp_k6x.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m4f";
 			reg = <0>;

dts/arm/nxp/nxp_kl25z.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m0+";
 			reg = <0>;

dts/arm/nxp/nxp_kw2xd.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-m4";
 			reg = <0>;

dts/arm/nxp/nxp_lpc54xxx.dtsi

@@ -11,11 +11,12 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m4f";
 			reg = <0>;
 		};
-		cpu@1 {
+
+		cpu1: cpu@1 {
 			compatible = "arm,cortex-m0+";
 			reg = <1>;
 		};

dts/arm/silabs/efm32hg.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m0+";
 			reg = <0>;
 		};

dts/arm/silabs/efm32pg12b.dtsi

@@ -14,7 +14,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m4f";
 			reg = <0>;
 		};

dts/arm/silabs/efm32wg.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m4f";
 			reg = <0>;
 		};

dts/arm/silabs/efr32fg1p.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m4f";
 			reg = <0>;
 		};

dts/arm/silabs/efr32mg.dtsi

@@ -10,7 +10,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m4f";
 			reg = <0>;
 		};

dts/arm/ti/msp432p4xx.dtsi

@@ -7,7 +7,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-m4f";
 			reg = <0>;
 		};

dts/xtensa/espressif/esp32.dtsi

@@ -10,13 +10,13 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "cadence,tensilica-xtensa-lx6";
 			reg = <0>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
 			device_type = "cpu";
 			compatible = "cadence,tensilica-xtensa-lx6";
 			reg = <1>;

dts/xtensa/intel/intel_s1000.dtsi

@@ -12,13 +12,13 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "cadence,tensilica-xtensa-lx6";
 			reg = <0>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
 			device_type = "cpu";
 			compatible = "cadence,tensilica-xtensa-lx6";
 			reg = <1>;

dts/xtensa/sample_controller.dtsi

@@ -11,7 +11,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "sample_controller";
 			reg = <0>;