drivers: peci: xec: Fix error recovery handling
Fix the error recovery mechanism that makes use of a temp variable to avoid coverity issue without breaking error recovery. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
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1 changed files with 7 additions and 6 deletions
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@ -244,7 +244,7 @@ static int peci_xec_transfer(const struct device *dev, struct peci_msg *msg)
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ARG_UNUSED(dev);
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int ret;
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PECI_Type *base = peci_xec_config.base;
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uint8_t err_val = base->ERROR;
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uint8_t err_val;
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ret = peci_xec_write(dev, msg);
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if (ret) {
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@ -267,6 +267,7 @@ static int peci_xec_transfer(const struct device *dev, struct peci_msg *msg)
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}
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/* Check for error conditions and perform bus recovery if necessary */
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err_val = base->ERROR;
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if (err_val) {
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if (base->ERROR & MCHP_PECI_ERR_RDOV) {
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LOG_WRN("Read buffer is not empty\n");
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@ -280,15 +281,15 @@ static int peci_xec_transfer(const struct device *dev, struct peci_msg *msg)
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LOG_WRN("Write buffer is not empty\n");
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}
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/* ERROR is a clear-on-write register, need to clear errors
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* occurring at the end of a transaction. A temp variable is
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* used to overcome complaints by the static code analyzer
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*/
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base->ERROR = err_val;
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LOG_WRN("Transaction error %x\n", base->ERROR);
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return -EIO;
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}
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/* ERROR is a clear-on-write register, need to clear errors occurred
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* at the end of a transaction.
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*/
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base->ERROR = err_val;
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return 0;
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}
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