michaelh/zephyr
1
0
Fork 0
Code Releases Activity

dts: use 'cdns,' instead of 'cadence,' consistently

Browse source 
The Linux vendor prefixes list uses 'cdns'. Match it, especially since
we have that prefix in our own list as well.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This commit is contained in:
Martí Bolívar 2021-08-03 15:49:25 -07:00 • committed by Christopher Friedt
commit 7cf99aa2f2
11 changed files with 22 additions and 23 deletions
Download patch file Download diff file Expand all files Collapse all files

2
dts/bindings/cpu/cadence,tensilica-xtensa-lx4.yaml
View file

@ -3,6 +3,6 @@
description: Cadence Tensilica Xtensa LX4 CPU description: Cadence Tensilica Xtensa LX4 CPU
compatible: "cadence,tensilica-xtensa-lx4" compatible: "cdns,tensilica-xtensa-lx4"
include: cpu.yaml include: cpu.yaml

2
dts/bindings/cpu/cadence,tensilica-xtensa-lx6.yaml
View file

@ -3,7 +3,7 @@
description: Cadence Tensilica Xtensa LX6 CPU description: Cadence Tensilica Xtensa LX6 CPU
compatible: "cadence,tensilica-xtensa-lx6" compatible: "cdns,tensilica-xtensa-lx6"
include: cpu.yaml include: cpu.yaml

1
dts/bindings/vendor-prefixes.txt
View file

@ -98,7 +98,6 @@ brcm Broadcom Corporation
buffalo Buffalo, Inc. buffalo Buffalo, Inc.
bur B&R Industrial Automation GmbH bur B&R Industrial Automation GmbH
bticino Bticino International bticino Bticino International
cadence Cadence Design Systems, Inc.
calaosystems CALAO Systems SAS calaosystems CALAO Systems SAS
calxeda Calxeda calxeda Calxeda
canaan Canaan, Inc. canaan Canaan, Inc.

4
dts/xtensa/espressif/esp32.dtsi
View file

@ -22,14 +22,14 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx6"; compatible = "cdns,tensilica-xtensa-lx6";
reg = <0>; reg = <0>;
clock-source = <ESP32_CLK_SRC_PLL>; clock-source = <ESP32_CLK_SRC_PLL>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx6"; compatible = "cdns,tensilica-xtensa-lx6";
reg = <1>; reg = <1>;
clock-source = <ESP32_CLK_SRC_PLL>; clock-source = <ESP32_CLK_SRC_PLL>;
}; };

2
dts/xtensa/espressif/esp32s2.dtsi
View file

@ -15,7 +15,7 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx7"; compatible = "cdns,tensilica-xtensa-lx7";
reg = <0>; reg = <0>;
}; };
}; };

2
dts/xtensa/intel/intel_byt_adsp.dtsi
View file

@ -15,7 +15,7 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <0>; reg = <0>;
}; };
}; };

4
dts/xtensa/intel/intel_cavs15.dtsi
View file

@ -15,13 +15,13 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <0>; reg = <0>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <1>; reg = <1>;
}; };
}; };

8
dts/xtensa/intel/intel_cavs18.dtsi
View file

@ -15,25 +15,25 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <0>; reg = <0>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <1>; reg = <1>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <2>; reg = <2>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <3>; reg = <3>;
}; };
}; };

8
dts/xtensa/intel/intel_cavs20.dtsi
View file

@ -15,25 +15,25 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <0>; reg = <0>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <1>; reg = <1>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <2>; reg = <2>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <3>; reg = <3>;
}; };
}; };

8
dts/xtensa/intel/intel_cavs25.dtsi
View file

@ -15,25 +15,25 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <0>; reg = <0>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <1>; reg = <1>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <2>; reg = <2>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx4"; compatible = "cdns,tensilica-xtensa-lx4";
reg = <3>; reg = <3>;
}; };
}; };

4
dts/xtensa/intel/intel_s1000.dtsi
View file

@ -14,13 +14,13 @@
cpu0: cpu@0 { cpu0: cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx6"; compatible = "cdns,tensilica-xtensa-lx6";
reg = <0>; reg = <0>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "cadence,tensilica-xtensa-lx6"; compatible = "cdns,tensilica-xtensa-lx6";
reg = <1>; reg = <1>;
}; };
}; };