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sys_io: x86: Fix I/O ports bit operations

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I/O ports are not memory and thus such asm instruction cannot follow
such constraint. Plus, usual BT* instruction can be used on normal
registers.

Change-Id: Ie3aad668173962a0a90e7cb11231c7843836d412
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2015-11-10 17:11:52 +01:00 • committed by Anas Nashif
commit 7cbe13ce3f
1 changed files with 12 additions and 25 deletions
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37
include/arch/x86/asm_inline_gcc.h
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@ -304,15 +304,11 @@ static inline __attribute__((always_inline))
{
uint32_t reg = 0;
__asm__ volatile("inl %%dx, %%eax\n"
"mov %1, 1\n"
"shl %%cl, %1\n"
"or %%eax, %1\n"
"outl %%eax, %%dx;\n\t"
__asm__ volatile("inl %w1, %0;\n\t"
"btsl %2, %0;\n\t"
"outl %0, %w1;\n\t"
:
: "d" (port),
"r" (reg), "d" (bit)
: "memory", "cc");
: "a" (reg), "Nd" (port), "Ir" (bit));
}
static inline __attribute__((always_inline))
@ -320,15 +316,11 @@ static inline __attribute__((always_inline))
{
uint32_t reg = 0;
__asm__ volatile("inl %%dx, %%eax\n"
"mov %1, 1\n"
"shl %%cl, %1\n"
"and %%eax, %1\n"
"outl %%eax, %%dx;\n\t"
__asm__ volatile("inl %w1, %0;\n\t"
"btrl %2, %0;\n\t"
"outl %0, %w1;\n\t"
:
: "d" (port),
"r" (reg), "d" (bit)
: "memory", "cc");
: "a" (reg), "Nd" (port), "Ir" (bit));
}
static inline __attribute__((always_inline))
@ -336,15 +328,10 @@ static inline __attribute__((always_inline))
{
uint32_t ret;
__asm__ volatile("inl %%dx, %%eax\n"
"bt %2, %%eax\n"
"lahf\n"
"mov %1, %%eax\n"
"clc;\n\t"
: "=r" (ret)
: "d" (port),
"Mr" (bit)
: "memory", "cc");
__asm__ volatile("inl %w1, %0\n\t"
"btl %2, %0\n\t"
: "=a" (ret)
: "Nd" (port), "Ir" (bit));
return (ret & 1);
}