spi: spi_ll_stm32: Add support for STM32F0
Add support for STM32F0 similar to STM32F3 and STM32L4 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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2 changed files with 15 additions and 4 deletions
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@ -54,11 +54,17 @@ config SPI_STM32
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bool
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prompt "STM32 MCU SPI controller driver"
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depends on SPI && SOC_FAMILY_STM32
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depends on SOC_SERIES_STM32L4X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32F3X
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depends on SOC_SERIES_STM32L4X || SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32F4X
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default n
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help
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Enable SPI support on the STM32 family of processors.
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config SPI_STM32_HAS_FIFO
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bool
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depends on SPI_STM32
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depends on SOC_SERIES_STM32L4X || SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
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default y
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config SPI_STM32_INTERRUPT
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bool
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prompt "STM32 MCU SPI Interrupt Support"
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@ -171,7 +171,7 @@ static void spi_stm32_complete(struct spi_stm32_data *data, SPI_TypeDef *spi,
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spi_context_cs_control(&data->ctx, false);
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#if defined(CONFIG_SOC_SERIES_STM32L4X) || defined(CONFIG_SOC_SERIES_STM32F3X)
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#if defined(CONFIG_SPI_STM32_HAS_FIFO)
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/* Flush RX buffer */
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while (LL_SPI_IsActiveFlag_RXNE(spi)) {
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(void) LL_SPI_ReceiveData8(spi);
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@ -310,7 +310,7 @@ static int spi_stm32_configure(struct spi_config *config)
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LL_SPI_SetDataWidth(spi, LL_SPI_DATAWIDTH_16BIT);
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}
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#if defined(CONFIG_SOC_SERIES_STM32L4X) || defined(CONFIG_SOC_SERIES_STM32F3X)
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#if defined(CONFIG_SPI_STM32_HAS_FIFO)
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LL_SPI_SetRxFIFOThreshold(spi, LL_SPI_RX_FIFO_TH_QUARTER);
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#endif
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LL_SPI_SetStandard(spi, LL_SPI_PROTOCOL_MOTOROLA);
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@ -371,7 +371,7 @@ static int transceive(struct spi_config *config,
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spi_context_buffers_setup(&data->ctx, tx_bufs, tx_count,
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rx_bufs, rx_count, 1);
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#if defined(CONFIG_SOC_SERIES_STM32L4X) || defined(CONFIG_SOC_SERIES_STM32F3X)
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#if defined(CONFIG_SPI_STM32_HAS_FIFO)
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/* Flush RX buffer */
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while (LL_SPI_IsActiveFlag_RXNE(spi)) {
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(void) LL_SPI_ReceiveData8(spi);
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@ -467,8 +467,13 @@ static void spi_stm32_irq_config_func_1(struct device *port);
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static const struct spi_stm32_config spi_stm32_cfg_1 = {
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.spi = (SPI_TypeDef *) SPI1_BASE,
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.pclken = {
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#ifdef CONFIG_SOC_SERIES_STM32F0X
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.enr = LL_APB1_GRP2_PERIPH_SPI1,
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.bus = STM32_CLOCK_BUS_APB1_2
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#else
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.enr = LL_APB2_GRP1_PERIPH_SPI1,
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.bus = STM32_CLOCK_BUS_APB2
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#endif
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},
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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.irq_config = spi_stm32_irq_config_func_1,
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