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drivers: Replace DEV_FAIL by -EIO

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This patch replaces all occurences of the macro DEV_FAIL by -EIO
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I0594ab5dbe667e074c250129e7c13ce512ac940f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This commit is contained in:
Andre Guedes 2016-03-09 14:38:02 -03:00 • committed by Anas Nashif
commit 7c956d2ece
21 changed files with 97 additions and 60 deletions
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2
drivers/802.15.4/cc2520.c
View file

@ -1262,7 +1262,7 @@ static int cc2520_init(struct device *dev)
cc2520_sgl_dev = NULL;
DBG("%s initialization failed\n", DRIVER_STR);
return DEV_FAIL;
return -EIO;
}
return 0;

4
drivers/adc/adc_dw.c
View file

@ -16,6 +16,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <init.h>
#include <nanokernel.h>
#include <string.h>
@ -293,7 +295,7 @@ static int adc_dw_read_request(struct device *dev, struct adc_seq_table *seq_tbl
if (info->state == ADC_STATE_ERROR) {
info->state = ADC_STATE_IDLE;
return DEV_FAIL;
return -EIO;
}
return 0;

8
drivers/adc/adc_qmsi.c
View file

@ -16,6 +16,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <init.h>
#include <nanokernel.h>
#include <string.h>
@ -147,7 +149,7 @@ static int adc_qmsi_read(struct device *dev, struct adc_seq_table *seq_tbl)
* the number of samples required has been captured
*/
if (qm_adc_convert(QM_ADC_0, &xfer) != QM_RC_OK) {
ret = DEV_FAIL;
ret = -EIO;
adc_unlock(info);
break;
}
@ -200,7 +202,7 @@ static int adc_qmsi_read(struct device *dev, struct adc_seq_table *seq_tbl)
*/
if (qm_adc_irq_convert(QM_ADC_0, &xfer) != QM_RC_OK) {
adc_context = NULL;
ret = DEV_FAIL;
ret = -EIO;
adc_unlock(info);
break;
}
@ -209,7 +211,7 @@ static int adc_qmsi_read(struct device *dev, struct adc_seq_table *seq_tbl)
device_sync_call_wait(&info->sync);
if (info->state == ADC_STATE_ERROR) {
ret = DEV_FAIL;
ret = -EIO;
adc_unlock(info);
break;
}

6
drivers/adc/adc_ti_adc108s102.c
View file

@ -16,6 +16,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <nanokernel.h>
#include <misc/util.h>
#include <string.h>
@ -171,11 +173,11 @@ static int ti_adc108s102_read(struct device *dev,
nano_timer_init(&timer, data);
if (spi_configure(adc->spi, &spi_conf)) {
return DEV_FAIL;
return -EIO;
}
if (spi_slave_select(adc->spi, config->spi_slave)) {
return DEV_FAIL;
return -EIO;
}
/* Resetting all internal channel data */

34
drivers/flash/spi_flash_w25qxxdv.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <flash.h>
#include <spi.h>
#include <init.h>
@ -31,7 +33,7 @@ static inline int spi_flash_wb_id(struct device *dev)
if (spi_transceive(driver_data->spi, buf, W25QXXDV_LEN_CMD_AND_ID,
buf, W25QXXDV_LEN_CMD_AND_ID) != 0) {
return DEV_FAIL;
return -EIO;
}
temp_data = ((uint32_t) buf[1]) << 16;
@ -57,11 +59,11 @@ static int spi_flash_wb_config(struct device *dev)
if (spi_slave_select(driver_data->spi,
CONFIG_SPI_FLASH_W25QXXDV_SPI_SLAVE) !=
0) {
return DEV_FAIL;
return -EIO;
}
if (spi_configure(driver_data->spi, &config) != 0) {
return DEV_FAIL;
return -EIO;
}
return spi_flash_wb_id(dev);
@ -73,7 +75,7 @@ static int spi_flash_wb_reg_read(struct device *dev, uint8_t *data)
uint8_t buf[2];
if (spi_transceive(driver_data->spi, data, 2, buf, 2) != 0) {
return DEV_FAIL;
return -EIO;
}
memcpy(data, buf, 2);
@ -103,7 +105,7 @@ static int spi_flash_wb_reg_write(struct device *dev, uint8_t *data)
if (spi_transceive(driver_data->spi, data, 1,
&buf /*dummy */, 1) != 0) {
return DEV_FAIL;
return -EIO;
}
return 0;
@ -123,7 +125,7 @@ static int spi_flash_wb_read(struct device *dev, off_t offset, void *data,
if (spi_flash_wb_config(dev) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
wait_for_flash_idle(dev);
@ -138,7 +140,7 @@ static int spi_flash_wb_read(struct device *dev, off_t offset, void *data,
if (spi_transceive(driver_data->spi, buf, len + W25QXXDV_LEN_CMD_ADDRESS,
buf, len + W25QXXDV_LEN_CMD_ADDRESS) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
memcpy(data, buf + W25QXXDV_LEN_CMD_ADDRESS, len);
@ -162,7 +164,7 @@ static int spi_flash_wb_write(struct device *dev, off_t offset,
if (spi_flash_wb_config(dev) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
wait_for_flash_idle(dev);
@ -172,7 +174,7 @@ static int spi_flash_wb_write(struct device *dev, off_t offset,
if (!(buf[1] & W25QXXDV_WEL_BIT)) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
wait_for_flash_idle(dev);
@ -186,7 +188,7 @@ static int spi_flash_wb_write(struct device *dev, off_t offset,
if (spi_write(driver_data->spi, buf, len + W25QXXDV_LEN_CMD_ADDRESS) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
nano_sem_give(&driver_data->sem);
@ -203,7 +205,7 @@ static int spi_flash_wb_write_protection_set(struct device *dev, bool enable)
if (spi_flash_wb_config(dev) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
wait_for_flash_idle(dev);
@ -216,7 +218,7 @@ static int spi_flash_wb_write_protection_set(struct device *dev, bool enable)
if (spi_flash_wb_reg_write(dev, &buf) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
nano_sem_give(&driver_data->sem);
@ -262,7 +264,7 @@ static inline int spi_flash_wb_erase_internal(struct device *dev,
len = 1;
break;
default:
return DEV_FAIL;
return -EIO;
}
@ -292,7 +294,7 @@ static int spi_flash_wb_erase(struct device *dev, off_t offset, size_t size)
if (spi_flash_wb_config(dev) != 0) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
buf[0] = W25QXXDV_CMD_RDSR;
@ -300,7 +302,7 @@ static int spi_flash_wb_erase(struct device *dev, off_t offset, size_t size)
if (!(buf[1] & W25QXXDV_WEL_BIT)) {
nano_sem_give(&driver_data->sem);
return DEV_FAIL;
return -EIO;
}
while ((size_remaining >= W25QXXDV_SECTOR_SIZE) && (ret == 0)) {
@ -353,7 +355,7 @@ static int spi_flash_init(struct device *dev)
spi_dev = device_get_binding(CONFIG_SPI_FLASH_W25QXXDV_SPI_NAME);
if (!spi_dev) {
return DEV_FAIL;
return -EIO;
}
data->spi = spi_dev;

4
drivers/gpio/gpio_qmsi.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <device.h>
#include <drivers/ioapic.h>
#include <gpio.h>
@ -312,7 +314,7 @@ int gpio_qmsi_init(struct device *port)
#endif /* CONFIG_GPIO_QMSI_AON */
default:
return DEV_FAIL;
return -EIO;
}
port->driver_api = &api_funcs;

8
drivers/i2c/i2c_atmel_sam3.c
View file

@ -32,6 +32,8 @@
* the Fujitsu I2C-based FRAM MB85RC256V.
*/
#include <errno.h>
#include <nanokernel.h>
#include <board.h>
@ -485,7 +487,7 @@ static int i2c_sam3_transfer(struct device *dev,
/* Device is busy servicing another transfer */
if (dev_data->state & STATE_BUSY) {
return DEV_FAIL;
return -EIO;
}
dev_data->state = STATE_BUSY;
@ -555,7 +557,7 @@ static int i2c_sam3_transfer(struct device *dev,
cfg->port->pdc.ptcr = PDC_PTCR_TXTDIS
| PDC_PTCR_RXTDIS;
ret = DEV_FAIL;
ret = -EIO;
goto done;
}
@ -571,7 +573,7 @@ static int i2c_sam3_transfer(struct device *dev,
i2c_sam3_runtime_configure(dev,
dev_data->dev_config.raw);
ret = DEV_FAIL;
ret = -EIO;
goto done;
}

8
drivers/i2c/i2c_dw.c
View file

@ -180,7 +180,7 @@ static int _i2c_dw_data_send(struct device *dev)
dw->xfr_buf++;
if (regs->ic_intr_stat.bits.tx_abrt) {
return DEV_FAIL;
return -EIO;
}
}
@ -445,7 +445,7 @@ static int i2c_dw_transfer(struct device *dev,
/* First step, check if there is current activity */
if ((regs->ic_status.bits.activity) || (dw->state & I2C_DW_BUSY)) {
return DEV_FAIL;
return -EIO;
}
dw->state |= I2C_DW_BUSY;
@ -503,13 +503,13 @@ static int i2c_dw_transfer(struct device *dev,
device_sync_call_wait(&dw->sync);
if (dw->state & I2C_DW_CMD_ERROR) {
ret = DEV_FAIL;
ret = -EIO;
break;
}
/* Something wrong if there is something left to do */
if (dw->xfr_len > 0) {
ret = DEV_FAIL;
ret = -EIO;
break;
}

10
drivers/i2c/i2c_qmsi.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <device.h>
#include <i2c.h>
#include <ioapic.h>
@ -95,7 +97,7 @@ static int i2c_qmsi_configure(struct device *dev, uint32_t config)
}
if (qm_i2c_set_config(instance, &qm_cfg) != QM_RC_OK)
return DEV_FAIL;
return -EIO;
return 0;
}
@ -171,13 +173,13 @@ static int i2c_qmsi_transfer(struct device *dev, struct i2c_msg *msgs,
rc = qm_i2c_master_irq_transfer(instance, &xfer, addr);
if (rc != QM_RC_OK)
return DEV_FAIL;
return -EIO;
/* Block current thread until the I2C transfer completes. */
device_sync_call_wait(&driver_data->sync);
if (driver_data->transfer_status != QM_RC_OK)
return DEV_FAIL;
return -EIO;
}
return 0;
@ -232,7 +234,7 @@ static int i2c_qmsi_init(struct device *dev)
#endif /* CONFIG_I2C_QMSI_1 */
default:
return DEV_FAIL;
return -EIO;
}
device_sync_call_init(&driver_data->sync);

7
drivers/i2c/i2c_quark_se_ss.c
View file

@ -21,6 +21,7 @@
* but with a different register set and different workflow.
*/
#include <errno.h>
#include <stdint.h>
#include <stdbool.h>
@ -254,7 +255,7 @@ static int _i2c_qse_ss_data_send(struct device *dev)
dw->xfr_buf++;
if (_i2c_qse_ss_check_irq(dev, IC_INTR_TX_ABRT)) {
return DEV_FAIL;
return -EIO;
}
}
@ -496,13 +497,13 @@ static int i2c_qse_ss_intr_transfer(struct device *dev,
/* Wait for transfer to be done */
device_sync_call_wait(&dw->sync);
if (dw->state & I2C_QSE_SS_CMD_ERROR) {
ret = DEV_FAIL;
ret = -EIO;
break;
}
/* Something wrong if there is something left to do */
if (dw->xfr_len > 0) {
ret = DEV_FAIL;
ret = -EIO;
break;
}

4
drivers/pwm/pwm_dw.c
View file

@ -27,6 +27,8 @@
* Accessing load count 2 registers, thus, requires some special treatment.
*/
#include <errno.h>
#include <nanokernel.h>
#include <pwm.h>
@ -171,7 +173,7 @@ static int pwm_dw_set_values(struct device *dev, int access_op,
case PWM_ACCESS_BY_PIN:
/* make sure the PWM port exists */
if (pwm >= cfg->num_ports) {
return DEV_FAIL;
return -EIO;
}
return __set_one_port(dev, pwm, on, off);

6
drivers/pwm/pwm_qmsi.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <nanokernel.h>
#include <pwm.h>
#include <device.h>
@ -57,7 +59,7 @@ static int __set_one_port(qm_pwm_t id, uint32_t pwm, uint32_t on, uint32_t off)
cfg.lo_count = off;
if (qm_pwm_set_config(id, pwm, &cfg) != QM_RC_OK) {
return DEV_FAIL;
return -EIO;
}
/* Enable timer so it starts running and counting */
qm_pwm_start(id, pwm);
@ -93,7 +95,7 @@ static int pwm_qmsi_set_values(struct device *dev, int access_op,
case PWM_ACCESS_BY_PIN:
/* make sure the PWM port exists */
if (pwm >= CONFIG_PWM_QMSI_NUM_PORTS) {
return DEV_FAIL;
return -EIO;
}
return __set_one_port(QM_PWM_0, pwm, on, off);

6
drivers/rtc/rtc_qmsi.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <device.h>
#include <drivers/ioapic.h>
#include <init.h>
@ -54,14 +56,14 @@ static int rtc_qmsi_set_config(struct device *dev, struct rtc_config *cfg)
user_callback = cfg->cb_fn;
if (qm_rtc_set_config(QM_RTC_0, &qm_cfg) != QM_RC_OK)
return DEV_FAIL;
return -EIO;
return 0;
}
static int rtc_qmsi_set_alarm(struct device *dev, const uint32_t alarm_val)
{
return qm_rtc_set_alarm(QM_RTC_0, alarm_val) == QM_RC_OK ? 0 : DEV_FAIL;
return qm_rtc_set_alarm(QM_RTC_0, alarm_val) == QM_RC_OK ? 0 : -EIO;
}
static uint32_t rtc_qmsi_read(struct device *dev)

8
drivers/shared_irq/shared_irq.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <nanokernel.h>
#include <device.h>
#include <shared_irq.h>
@ -45,7 +47,7 @@ static int isr_register(struct device *dev, isr_t isr_func,
return 0;
}
}
return DEV_FAIL;
return -EIO;
}
/**
@ -66,7 +68,7 @@ static inline int enable(struct device *dev, struct device *isr_dev)
return 0;
}
}
return DEV_FAIL;
return -EIO;
}
static int last_enabled_isr(struct shared_irq_runtime *clients, int count)
@ -100,7 +102,7 @@ static inline int disable(struct device *dev, struct device *isr_dev)
return 0;
}
}
return DEV_FAIL;
return -EIO;
}
void shared_irq_isr(struct device *dev)

4
drivers/spi/spi_dw.c
View file

@ -16,6 +16,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <nanokernel.h>
#include <arch/cpu.h>
@ -307,7 +309,7 @@ static int spi_dw_transceive(struct device *dev,
if (spi->error) {
spi->error = 0;
return DEV_FAIL;
return -EIO;
}
return 0;

4
drivers/spi/spi_intel.c
View file

@ -16,6 +16,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <nanokernel.h>
#include <arch/cpu.h>
@ -300,7 +302,7 @@ static int spi_intel_transceive(struct device *dev,
if (spi->error) {
spi->error = 0;
return DEV_FAIL;
return -EIO;
}
return 0;

4
drivers/spi/spi_k64.c
View file

@ -46,6 +46,8 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <errno.h>
#include <nanokernel.h>
#include <arch/cpu.h>
@ -642,7 +644,7 @@ static int spi_k64_transceive(struct device *dev,
if (spi_data->error) {
spi_data->error = 0;
return DEV_FAIL;
return -EIO;
}
return 0;

10
drivers/spi/spi_qmsi.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <device.h>
#include <drivers/ioapic.h>
#include <init.h>
@ -139,7 +141,7 @@ static int spi_qmsi_slave_select(struct device *dev, uint32_t slave)
struct spi_qmsi_config *spi_config = dev->config->config_info;
qm_spi_t spi = spi_config->spi;
return qm_spi_slave_select(spi, 1 << (slave - 1)) ? DEV_FAIL : 0;
return qm_spi_slave_select(spi, 1 << (slave - 1)) ? -EIO : 0;
}
static inline uint8_t frame_size_to_dfs(qm_spi_frame_size_t frame_size)
@ -205,12 +207,12 @@ static int spi_qmsi_transceive(struct device *dev,
rc = qm_spi_irq_transfer(spi, xfer);
if (rc != QM_RC_OK) {
spi_control_cs(dev, false);
return DEV_FAIL;
return -EIO;
}
device_sync_call_wait(&context->sync);
return context->rc ? DEV_FAIL : 0;
return context->rc ? -EIO : 0;
}
static int spi_qmsi_suspend(struct device *dev)
@ -279,7 +281,7 @@ static int spi_qmsi_init(struct device *dev)
#endif /* CONFIG_SPI_QMSI_PORT_1 */
default:
return DEV_FAIL;
return -EIO;
}
context->gpio_cs = gpio_cs_init(spi_config);

4
drivers/watchdog/wdt_dw.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <nanokernel.h>
#include <init.h>
#include <clock_control.h>
@ -126,7 +128,7 @@ static int wdt_dw_set_config(struct device *dev, struct wdt_config *config)
sys_clear_bit(wdt_dev->base_address + WDT_CR, 1);
} else {
if (!config->interrupt_fn) {
return DEV_FAIL;
return -EIO;
}
context->cb_fn = config->interrupt_fn;

4
samples/drivers/i2c_fujitsu_fram/src/main.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <zephyr.h>
#include <misc/printk.h>
@ -154,7 +156,7 @@ void main(void)
/* printk("0x%X ?= 0x%X\n", cmp_data[i], data[i]); */
if (cmp_data[i] != data[i]) {
printk("Data comparison failed @ %d.\n", i);
ret = DEV_FAIL;
ret = -EIO;
}
}
if (ret == 0) {

12
samples/drivers/w25q80bl/src/main.c
View file

@ -14,6 +14,8 @@
* limitations under the License.
*/
#include <errno.h>
#include <zephyr.h>
#include <device.h>
@ -39,7 +41,7 @@ int w25q80bl_read_id(struct device *dev, uint8_t *manufacturer, uint8_t *devicei
rx_buffer, sizeof(rx_buffer));
if (err) {
printk("Error during SPI transfer\n");
return DEV_FAIL;
return -EIO;
}
if (manufacturer)
@ -61,7 +63,7 @@ int main(void)
printk("SPI Example application\n");
if (!spi_mst_0)
return DEV_FAIL;
return -EIO;
config.config = SPI_MODE_CPOL | SPI_MODE_CPHA | SPI_WORD(8);
config.max_sys_freq = 256;
@ -69,19 +71,19 @@ int main(void)
err = spi_configure(spi_mst_0, &config);
if (err) {
printk("Could not configure SPI device\n");
return DEV_FAIL;
return -EIO;
}
err = spi_slave_select(spi_mst_0, 1);
if (err) {
printk("Could not select SPI slave\n");
return DEV_FAIL;
return -EIO;
}
err = w25q80bl_read_id(spi_mst_0, &manufacturer, &device_id);
if (err) {
printk("Could not get Manufacturer and Device ID from SPI Flash\n");
return DEV_FAIL;
return -EIO;
}
printk("SPI Flash Manufacturer %x Device Id %x\n", manufacturer,