pci: Add helper functions to enable mem mapped registers

This will be useful to enable memory mapped registers for PCI based
drivers that requires it. Removing redundant setting as well.

Change-Id: I52e47d01263a2de31c0c9f52ff65cc7e2734cf08
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2015-08-21 12:53:40 +03:00 committed by Anas Nashif
commit 7b34e0dcfa
2 changed files with 42 additions and 5 deletions

View file

@ -390,6 +390,35 @@ void pci_bus_scan_init(void)
lookup.bar = 0; lookup.bar = 0;
} }
void pci_enable_regs(struct pci_dev_info *dev_info)
{
union pci_addr_reg pci_ctrl_addr;
uint32_t pci_data;
pci_ctrl_addr.value = 0;
pci_ctrl_addr.field.func = dev_info->function;
pci_ctrl_addr.field.bus = dev_info->bus;
pci_ctrl_addr.field.device = dev_info->dev;
pci_ctrl_addr.field.reg = 1;
#ifdef CONFIG_PCI_DEBUG
printk("pci_enable_regs 0x%x\n", pci_ctrl_addr);
#endif
pci_read(DEFAULT_PCI_CONTROLLER,
pci_ctrl_addr,
sizeof(uint16_t),
&pci_data);
pci_data = pci_data | PCI_CMD_MEM_ENABLE;
pci_write(DEFAULT_PCI_CONTROLLER,
pci_ctrl_addr,
sizeof(uint16_t),
pci_data);
}
/** /**
* *
* @brief Scans PCI bus for devices * @brief Scans PCI bus for devices
@ -427,7 +456,6 @@ int pci_bus_scan(struct pci_dev_info *dev_info)
/* initialise the PCI controller address register value */ /* initialise the PCI controller address register value */
pci_ctrl_addr.value = 0; pci_ctrl_addr.value = 0;
pci_ctrl_addr.field.enable = 1;
if (lookup.info.function != PCI_FUNCTION_ANY) { if (lookup.info.function != PCI_FUNCTION_ANY) {
lookup.func = lookup.info.function; lookup.func = lookup.info.function;
@ -440,6 +468,9 @@ int pci_bus_scan(struct pci_dev_info *dev_info)
pci_ctrl_addr.field.device = lookup.dev; pci_ctrl_addr.field.device = lookup.dev;
if (pci_dev_scan(pci_ctrl_addr, dev_info)) { if (pci_dev_scan(pci_ctrl_addr, dev_info)) {
dev_info->bus = lookup.bus;
dev_info->dev = lookup.dev;
return 1; return 1;
} }

View file

@ -53,16 +53,22 @@ struct pci_dev_info {
uint32_t addr; /* I/O or memory region address */ uint32_t addr; /* I/O or memory region address */
uint32_t size; /* memory region size */ uint32_t size; /* memory region size */
int irq; int irq;
uint16_t mem_type:1; /* memory type: BAR_SPACE_MEM/BAR_SPACE_IO */
uint16_t class:8; uint32_t bus:8;
uint16_t function:4; uint32_t dev:5;
uint16_t bar:3; uint32_t function:4;
uint32_t mem_type:1; /* memory type: BAR_SPACE_MEM/BAR_SPACE_IO */
uint32_t class:8;
uint32_t bar:3;
uint32_t _reserved:3;
uint16_t vendor_id; uint16_t vendor_id;
uint16_t device_id; uint16_t device_id;
}; };
extern void pci_bus_scan_init(void); extern void pci_bus_scan_init(void);
extern int pci_bus_scan(struct pci_dev_info *dev_info); extern int pci_bus_scan(struct pci_dev_info *dev_info);
void pci_enable_regs(struct pci_dev_info *dev_info);
#ifdef CONFIG_PCI_DEBUG #ifdef CONFIG_PCI_DEBUG
extern void pci_show(struct pci_dev_info *dev_info); extern void pci_show(struct pci_dev_info *dev_info);