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linker: remove manual name specification

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As memory region names are now derived purely from devicetree, remove
the `name` parameter from `DT_REGION_FROM_NODE_STATUS_OKAY`. Name is
`zephyr,linker-region` if it exists, otherwise the node path.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit is contained in:
Jordan Yates 2021-06-17 22:36:38 +10:00 • committed by Carles Cufí
commit 7b2a388d1d
5 changed files with 35 additions and 31 deletions
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2
include/arch/arm/aarch32/cortex_a_r/scripts/linker.ld
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@ -81,7 +81,7 @@ MEMORY
{ {
FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
LINKER_DT_REGION_FROM_NODE(OCM, rw, DT_CHOSEN(zephyr_ocm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_ocm), rw)
/* Used by and documented in include/linker/intlist.ld */ /* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
} }

22
include/arch/arm/aarch32/cortex_m/scripts/linker.ld
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@ -82,21 +82,21 @@ MEMORY
FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
/* TI CCFG Registers */ /* TI CCFG Registers */
LINKER_DT_REGION_FROM_NODE(FLASH_CCFG, rwx, DT_NODELABEL(ti_ccfg_partition)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(ti_ccfg_partition), rwx)
/* Data & Instruction Tightly Coupled Memory */ /* Data & Instruction Tightly Coupled Memory */
LINKER_DT_REGION_FROM_NODE(ITCM, rw, DT_CHOSEN(zephyr_itcm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_itcm), rw)
LINKER_DT_REGION_FROM_NODE(DTCM, rw, DT_CHOSEN(zephyr_dtcm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_dtcm), rw)
/* STM32 Core Coupled Memory */ /* STM32 Core Coupled Memory */
LINKER_DT_REGION_FROM_NODE(CCM, rw, DT_CHOSEN(zephyr_ccm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_ccm), rw)
/* STM32WB IPC RAM */ /* STM32WB IPC RAM */
LINKER_DT_REGION_FROM_NODE(SRAM1, rw, DT_NODELABEL(sram1)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(sram1), rw)
LINKER_DT_REGION_FROM_NODE(SRAM2, rw, DT_NODELABEL(sram2)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(sram2), rw)
/* STM32 alternate RAM configurations */ /* STM32 alternate RAM configurations */
LINKER_DT_REGION_FROM_NODE(SRAM3, rw, DT_NODELABEL(sram3)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(sram3), rw)
LINKER_DT_REGION_FROM_NODE(SRAM4, rw, DT_NODELABEL(sram4)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(sram4), rw)
LINKER_DT_REGION_FROM_NODE(SDRAM1, rw, DT_NODELABEL(sdram1)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(sdram1), rw)
LINKER_DT_REGION_FROM_NODE(SDRAM2, rw, DT_NODELABEL(sdram2)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(sdram2), rw)
LINKER_DT_REGION_FROM_NODE(BACKUP_SRAM, rw, DT_NODELABEL(backup_sram)) LINKER_DT_REGION_FROM_NODE(DT_NODELABEL(backup_sram), rw)
/* Used by and documented in include/linker/intlist.ld */ /* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
} }

4
include/arch/riscv/common/linker.ld
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@ -82,8 +82,8 @@ MEMORY
RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE
/* Data & Instruction Tightly Coupled Memory */ /* Data & Instruction Tightly Coupled Memory */
LINKER_DT_REGION_FROM_NODE(ITCM, rw, DT_CHOSEN(zephyr_itcm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_itcm), rw)
LINKER_DT_REGION_FROM_NODE(DTCM, rw, DT_CHOSEN(zephyr_dtcm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_dtcm), rw)
/* Used by and documented in include/linker/intlist.ld */ /* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K

34
include/linker/devicetree_regions.h
View file

@ -35,25 +35,29 @@
#define LINKER_DT_NODE_REGION_NAME(node_id) \ #define LINKER_DT_NODE_REGION_NAME(node_id) \
DT_PROP_OR(node_id, zephyr_memory_region, DT_NODE_PATH(node_id)) DT_PROP_OR(node_id, zephyr_memory_region, DT_NODE_PATH(node_id))
/* Declare a memory region */ /** @cond INTERNAL_HIDDEN */
#define _REGION_DECLARE(name, attr, node) name(attr) : \
ORIGIN = DT_REG_ADDR(node), \ /**
LENGTH = DT_REG_SIZE(node) * @brief Declare a memory region
*
* @param node_id devicetree node identifier
* @param attr region attributes
*/
#define _REGION_DECLARE(node_id, attr) \
LINKER_DT_NODE_REGION_NAME(node_id)(attr) : \
ORIGIN = DT_REG_ADDR(node_id), \
LENGTH = DT_REG_SIZE(node_id)
/** @endcond */
/** /**
* @brief Generate a linker memory region from a devicetree node * @brief Generate a linker memory region from a devicetree node
* *
* If @p node_id refers to a node with status "okay", then this declares * @param node_id devicetree node identifier with a \<reg\> property defining
* a linker memory region named @p name with attributes from @p attr. * region location and size
*
* Otherwise, it doesn't expand to anything.
*
* @param name name of the generated memory region
* @param attr region attributes to use (rx, rw, ...) * @param attr region attributes to use (rx, rw, ...)
* @param node_id devicetree node identifier with a \<reg\> property
* defining region location and size.
*/ */
#define LINKER_DT_REGION_FROM_NODE(name, attr, node_id) \ #define LINKER_DT_REGION_FROM_NODE(node_id, attr) \
COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), \ COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), \
(_REGION_DECLARE(name, attr, node_id)), \ (_REGION_DECLARE(node_id, attr)), \
()) ())

4
soc/riscv/riscv-privilege/andes_v5/ae350/linker.ld
View file

@ -88,8 +88,8 @@ MEMORY
RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE
/* Data & Instruction Tightly Coupled Memory */ /* Data & Instruction Tightly Coupled Memory */
LINKER_DT_REGION_FROM_NODE(ITCM, rw, DT_CHOSEN(zephyr_itcm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_itcm), rw)
LINKER_DT_REGION_FROM_NODE(DTCM, rw, DT_CHOSEN(zephyr_dtcm)) LINKER_DT_REGION_FROM_NODE(DT_CHOSEN(zephyr_dtcm), rw)
/* Used by and documented in include/linker/intlist.ld */ /* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K