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soc: nordic: Refactor soc_secure.h

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The soc_secure_* function are used by the non-secure application
to access hardware resources which are mapped as secure.
Using these functions for hardware resources mapped as non-secure
is missleading.

We have some soc_secure_* functions which read FICR values.
In nRF91 and nRF53 platforms this made sense since FICR
has hardware fixed mapping as secure.
For nRF54 though the FICR has hardware fixed mapping as non-secure.

This change refactors the soc_secure.h to exclude the functions
which read FICR values from being included when FICR is mapped as
non-secure.

Also updates the hwinfo and ieee802154 drivers to adjust to this change.

Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
This commit is contained in:
Georgios Vasilakis 2024-03-08 13:26:21 +01:00 • committed by David Leach
commit 7a8d454e22
3 changed files with 46 additions and 19 deletions
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12
drivers/hwinfo/hwinfo_nrf.c
View file

@ -7,12 +7,17 @@
#include <soc.h> #include <soc.h>
#include <zephyr/drivers/hwinfo.h> #include <zephyr/drivers/hwinfo.h>
#include <string.h> #include <string.h>
#include <hal/nrf_ficr.h>
#include <zephyr/sys/byteorder.h> #include <zephyr/sys/byteorder.h>
#ifndef CONFIG_BOARD_QEMU_CORTEX_M0 #ifndef CONFIG_BOARD_QEMU_CORTEX_M0
#include <helpers/nrfx_reset_reason.h> #include <helpers/nrfx_reset_reason.h>
#endif #endif
#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && defined(NRF_FICR_S)
#include <soc_secure.h> #include <soc_secure.h>
#else
#include <hal/nrf_ficr.h>
#endif
struct nrf_uid { struct nrf_uid {
uint32_t id[2]; uint32_t id[2];
}; };
@ -22,7 +27,12 @@ ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length)
struct nrf_uid dev_id; struct nrf_uid dev_id;
uint32_t deviceid[2]; uint32_t deviceid[2];
#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && defined(NRF_FICR_S)
soc_secure_read_deviceid(deviceid); soc_secure_read_deviceid(deviceid);
#else
deviceid[0] = nrf_ficr_deviceid_get(NRF_FICR, 0);
deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR, 1);
#endif
dev_id.id[0] = sys_cpu_to_be32(deviceid[1]); dev_id.id[0] = sys_cpu_to_be32(deviceid[1]);
dev_id.id[1] = sys_cpu_to_be32(deviceid[0]); dev_id.id[1] = sys_cpu_to_be32(deviceid[0]);

11
drivers/ieee802154/ieee802154_nrf5.c
View file

@ -25,7 +25,13 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#include <zephyr/debug/stack.h> #include <zephyr/debug/stack.h>
#include <soc.h> #include <soc.h>
#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && defined(NRF_FICR_S)
#include <soc_secure.h> #include <soc_secure.h>
#else
#include <hal/nrf_ficr.h>
#endif
#include <zephyr/device.h> #include <zephyr/device.h>
#include <zephyr/init.h> #include <zephyr/init.h>
#include <zephyr/debug/stack.h> #include <zephyr/debug/stack.h>
@ -120,7 +126,12 @@ static void nrf5_get_eui64(uint8_t *mac)
mac[index++] = (IEEE802154_NRF5_VENDOR_OUI >> 8) & 0xff; mac[index++] = (IEEE802154_NRF5_VENDOR_OUI >> 8) & 0xff;
mac[index++] = IEEE802154_NRF5_VENDOR_OUI & 0xff; mac[index++] = IEEE802154_NRF5_VENDOR_OUI & 0xff;
#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && defined(NRF_FICR_S)
soc_secure_read_deviceid(deviceid); soc_secure_read_deviceid(deviceid);
#else
deviceid[0] = nrf_ficr_deviceid_get(NRF_FICR, 0);
deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR, 1);
#endif
factoryAddress = (uint64_t)deviceid[EUI64_ADDR_HIGH] << 32; factoryAddress = (uint64_t)deviceid[EUI64_ADDR_HIGH] << 32;
factoryAddress |= deviceid[EUI64_ADDR_LOW]; factoryAddress |= deviceid[EUI64_ADDR_LOW];

42
soc/nordic/common/soc_secure.h
View file

@ -15,6 +15,25 @@ void soc_secure_gpio_pin_mcu_select(uint32_t pin_number, nrf_gpio_pin_sel_t mcu)
int soc_secure_mem_read(void *dst, void *src, size_t len); int soc_secure_mem_read(void *dst, void *src, size_t len);
#else /* defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) */
#if NRF_GPIO_HAS_SEL
static inline void soc_secure_gpio_pin_mcu_select(uint32_t pin_number, nrf_gpio_pin_sel_t mcu)
{
nrf_gpio_pin_control_select(pin_number, mcu);
}
#endif /* NRF_GPIO_HAS_SEL */
static inline int soc_secure_mem_read(void *dst, void *src, size_t len)
{
(void)memcpy(dst, src, len);
return 0;
}
#endif /* defined CONFIG_TRUSTED_EXECUTION_NONSECURE */
/* Include these soc_secure_* functions only when the FICR is mapped as secure only */
#if defined(NRF_FICR_S)
#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
#if defined(CONFIG_SOC_HFXO_CAP_INTERNAL) #if defined(CONFIG_SOC_HFXO_CAP_INTERNAL)
static inline uint32_t soc_secure_read_xosc32mtrim(void) static inline uint32_t soc_secure_read_xosc32mtrim(void)
{ {
@ -41,31 +60,18 @@ static inline void soc_secure_read_deviceid(uint32_t deviceid[2])
} }
#else /* defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) */ #else /* defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) */
static inline int soc_secure_mem_read(void *dst, void *src, size_t len)
{
(void)memcpy(dst, src, len);
return 0;
}
#if NRF_GPIO_HAS_SEL
static inline void soc_secure_gpio_pin_mcu_select(uint32_t pin_number,
nrf_gpio_pin_sel_t mcu)
{
nrf_gpio_pin_control_select(pin_number, mcu);
}
#endif /* NRF_GPIO_HAS_SEL */
#if defined(CONFIG_SOC_HFXO_CAP_INTERNAL) #if defined(CONFIG_SOC_HFXO_CAP_INTERNAL)
static inline uint32_t soc_secure_read_xosc32mtrim(void) static inline uint32_t soc_secure_read_xosc32mtrim(void)
{ {
return NRF_FICR->XOSC32MTRIM; return NRF_FICR_S->XOSC32MTRIM;
} }
#endif /* defined(CONFIG_SOC_HFXO_CAP_INTERNAL) */ #endif /* defined(CONFIG_SOC_HFXO_CAP_INTERNAL) */
static inline void soc_secure_read_deviceid(uint32_t deviceid[2]) static inline void soc_secure_read_deviceid(uint32_t deviceid[2])
{ {
deviceid[0] = nrf_ficr_deviceid_get(NRF_FICR, 0); deviceid[0] = nrf_ficr_deviceid_get(NRF_FICR_S, 0);
deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR, 1); deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR_S, 1);
} }
#endif /* defined CONFIG_TRUSTED_EXECUTION_NONSECURE */ #endif /* defined CONFIG_TRUSTED_EXECUTION_NONSECURE */
#endif /* defined(NRF_FICR_S) */