boards: qemu_xtensa: use dc233c core

This changes qemu_xtensa to use dc233c core instead of
sample_controller. The sample_controller uses a very
basic configuration which lacks features usually needed
in real world applications. Instead, use the dc233c core
as the base for qemu_xtensa so we can use QEMU to cover
more of our code path.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2023-09-13 12:45:50 -07:00 committed by Carles Cufí
commit 7a7aeb21e2
7 changed files with 14 additions and 14 deletions

View file

@ -5,7 +5,7 @@
config BOARD_QEMU_XTENSA config BOARD_QEMU_XTENSA
bool "Xtensa emulation using QEMU" bool "Xtensa emulation using QEMU"
depends on SOC_XTENSA_SAMPLE_CONTROLLER depends on SOC_XTENSA_DC233C
select QEMU_TARGET select QEMU_TARGET
config BOARD_QEMU_XTENSA_MMU config BOARD_QEMU_XTENSA_MMU

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@ -2,13 +2,7 @@
set(SUPPORTED_EMU_PLATFORMS qemu) set(SUPPORTED_EMU_PLATFORMS qemu)
if(CONFIG_BOARD_QEMU_XTENSA) if(CONFIG_BOARD_QEMU_XTENSA OR CONFIG_BOARD_QEMU_XTENSA_MMU)
set(QEMU_CPU_TYPE_${ARCH} sample_controller)
set(QEMU_FLAGS_${ARCH}
-machine sim -semihosting -nographic -cpu sample_controller
)
elseif(CONFIG_BOARD_QEMU_XTENSA_MMU)
set(QEMU_CPU_TYPE_${ARCH} dc233c) set(QEMU_CPU_TYPE_${ARCH} dc233c)
set(QEMU_FLAGS_${ARCH} set(QEMU_FLAGS_${ARCH}

View file

@ -1,16 +1,16 @@
/* /*
* Copyright (c) 2019 Intel Corporation. * Copyright (c) 2019, 2023 Intel Corporation.
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
/dts-v1/; /dts-v1/;
#include "sample_controller.dtsi" #include "dc233c.dtsi"
/ { / {
model = "qemu_xtensa"; model = "qemu_xtensa";
compatible = "cdns,xtensa-sample-controller"; compatible = "cdns,xtensa-dc233c";
chosen { chosen {
zephyr,sram = &sram0; zephyr,sram = &sram0;

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@ -3,7 +3,7 @@
CONFIG_MAIN_STACK_SIZE=2048 CONFIG_MAIN_STACK_SIZE=2048
CONFIG_BOARD_QEMU_XTENSA=y CONFIG_BOARD_QEMU_XTENSA=y
CONFIG_CONSOLE=y CONFIG_CONSOLE=y
CONFIG_SOC_XTENSA_SAMPLE_CONTROLLER=y CONFIG_SOC_XTENSA_DC233C=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
CONFIG_STACK_SENTINEL=y CONFIG_STACK_SENTINEL=y
CONFIG_GEN_ISR_TABLES=y CONFIG_GEN_ISR_TABLES=y

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@ -22,7 +22,8 @@ config XTENSA_MMU_NUM_L2_TABLES
# via TLB way 4 (which covers 1MB). # via TLB way 4 (which covers 1MB).
config SRAM_OFFSET config SRAM_OFFSET
hex hex
default 0x100000 default 0x100000 if XTENSA_MMU
default 0x2400
config KERNEL_VM_OFFSET config KERNEL_VM_OFFSET
hex hex

View file

@ -346,6 +346,10 @@ SECTIONS
} >vec_helpers :vec_helpers_phdr } >vec_helpers :vec_helpers_phdr
#endif /* CONFIG_XTENSA_MMU */ #endif /* CONFIG_XTENSA_MMU */
#ifdef CONFIG_CODE_DATA_RELOCATION
#include <linker_relocate.ld>
#endif
.ResetVector.text : ALIGN(4) .ResetVector.text : ALIGN(4)
{ {
__rom_region_start = ABSOLUTE(.); __rom_region_start = ABSOLUTE(.);
@ -363,6 +367,7 @@ SECTIONS
*(.entry.text) *(.entry.text)
*(.init.literal) *(.init.literal)
*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text) *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
*(.iram1.literal .iram1)
KEEP(*(.init)) KEEP(*(.init))
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal) *(.fini.literal)

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@ -26,4 +26,4 @@ PHDRS
#define MPU_ALIGN(region_size) \ #define MPU_ALIGN(region_size) \
. = ALIGN(4) . = ALIGN(4)
#include <xtensa-sample-controller.ld> #include <xtensa-dc233c.ld>