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power: Fix naming of Kconfig options controlling low power states

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The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit is contained in:
Piotr Zięcik 2019-02-01 15:16:37 +01:00 • committed by Anas Nashif
commit 7a49356c77
41 changed files with 53 additions and 53 deletions
Download patch file Download diff file Expand all files Collapse all files

4
arch/Kconfig
View file

@ -350,11 +350,11 @@ config ARCH_HAS_THREAD_ABORT
# Hidden PM feature configs which are to be selected by
# individual SoC.
#
config SYS_POWER_LOW_POWER_STATE_SUPPORTED
config SYS_POWER_LOW_POWER_STATES_SUPPORTED
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_LOW_POWER_STATE
This option signifies that the target supports the SYS_POWER_LOW_POWER_STATES
configuration option.
config SYS_POWER_STATE_CPU_LPS_SUPPORTED

2
doc/reference/power_management/index.rst
View file

@ -437,7 +437,7 @@ the following configuration flags.
This flag enables the tickless idle power saving feature.
:option:`CONFIG_SYS_POWER_LOW_POWER_STATE`
:option:`CONFIG_SYS_POWER_LOW_POWER_STATES`
This flag enables support for the Low Power states.

8
include/power.h
View file

@ -26,7 +26,7 @@ extern "C" {
enum power_states {
SYS_POWER_STATE_AUTO = (-2),
SYS_POWER_STATE_ACTIVE = (-1),
#ifdef CONFIG_SYS_POWER_LOW_POWER_STATE
#ifdef CONFIG_SYS_POWER_LOW_POWER_STATES
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
SYS_POWER_STATE_CPU_LPS,
# endif
@ -36,7 +36,7 @@ enum power_states {
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
SYS_POWER_STATE_CPU_LPS_2,
# endif
#endif /* CONFIG_SYS_POWER_LOW_POWER_STATE */
#endif /* CONFIG_SYS_POWER_LOW_POWER_STATES */
#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
# ifdef CONFIG_SYS_POWER_STATE_DEEP_SLEEP_SUPPORTED
@ -72,7 +72,7 @@ extern unsigned char sys_pm_idle_exit_notify;
static inline bool sys_pm_is_low_power_state(enum power_states state)
{
switch (state) {
#ifdef CONFIG_SYS_POWER_LOW_POWER_STATE
#ifdef CONFIG_SYS_POWER_LOW_POWER_STATES
# ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_SUPPORTED
case SYS_POWER_STATE_CPU_LPS:
/* FALLTHROUGH */
@ -86,7 +86,7 @@ static inline bool sys_pm_is_low_power_state(enum power_states state)
/* FALLTHROUGH */
# endif
return true;
#endif /* CONFIG_SYS_POWER_LOW_POWER_STATE */
#endif /* CONFIG_SYS_POWER_LOW_POWER_STATES */
default:
return false;

10
kernel/Kconfig.power_mgmt
View file

@ -6,7 +6,7 @@
#
menuconfig SYS_POWER_MANAGEMENT
bool "Power management"
bool "System Power management"
select TICKLESS_IDLE
help
This option enables the board to implement extra power management
@ -38,9 +38,9 @@ config PM_CONTROL_OS
endchoice # POWER_MANAGEMENT_CONTROL
config SYS_POWER_LOW_POWER_STATE
bool "Low power state"
depends on SYS_POWER_LOW_POWER_STATE_SUPPORTED
config SYS_POWER_LOW_POWER_STATES
bool "Low Power states"
depends on SYS_POWER_LOW_POWER_STATES_SUPPORTED
help
This option enables the kernel to interface with a power manager
application. This permits the system to enter a custom CPU low power
@ -49,7 +49,7 @@ config SYS_POWER_LOW_POWER_STATE
saving most power.
config SYS_POWER_DEEP_SLEEP
bool "Deep sleep state"
bool "Deep Sleep states"
depends on SYS_POWER_DEEP_SLEEP_SUPPORTED
help
This option enables the kernel to interface with a power manager

6
kernel/idle.c
View file

@ -26,7 +26,7 @@
*/
unsigned char sys_pm_idle_exit_notify;
#if defined(CONFIG_SYS_POWER_LOW_POWER_STATE)
#if defined(CONFIG_SYS_POWER_LOW_POWER_STATES)
void __attribute__((weak)) sys_resume(void)
{
}
@ -74,7 +74,7 @@ static void sys_power_save_idle(void)
#endif
set_kernel_idle_time_in_ticks(ticks);
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATE) || \
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES) || \
defined(CONFIG_SYS_POWER_DEEP_SLEEP))
sys_pm_idle_exit_notify = 1U;
@ -104,7 +104,7 @@ static void sys_power_save_idle(void)
void _sys_power_save_idle_exit(s32_t ticks)
{
#if defined(CONFIG_SYS_POWER_LOW_POWER_STATE)
#if defined(CONFIG_SYS_POWER_LOW_POWER_STATES)
/* Some CPU low power states require notification at the ISR
* to allow any operations that needs to be done before kernel
* switches task or processes nested interrupts. This can be

2
samples/boards/nrf52/power_mgr/Kconfig
View file

@ -1,7 +1,7 @@
config NRF5_POWER_MGMT_EXAMPLE
bool
default y
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
help

2
samples/boards/nrf52/power_mgr/prj.conf
View file

@ -1,7 +1,7 @@
CONFIG_BT=n
CONFIG_TIMESLICING=n
CONFIG_SYS_POWER_MANAGEMENT=y
CONFIG_SYS_POWER_LOW_POWER_STATE=y
CONFIG_SYS_POWER_LOW_POWER_STATES=y
CONFIG_SYS_POWER_DEEP_SLEEP=y
CONFIG_DEVICE_POWER_MANAGEMENT=y
CONFIG_PM_CONTROL_OS=y

2
samples/boards/nrf52/power_mgr/prj_tickless.conf
View file

@ -1,7 +1,7 @@
CONFIG_NUM_COOP_PRIORITIES=29
CONFIG_NUM_PREEMPT_PRIORITIES=40
CONFIG_SYS_POWER_MANAGEMENT=y
CONFIG_SYS_POWER_LOW_POWER_STATE=y
CONFIG_SYS_POWER_LOW_POWER_STATES=y
CONFIG_SYS_POWER_DEEP_SLEEP=y
CONFIG_DEVICE_POWER_MANAGEMENT=y
CONFIG_TICKLESS_KERNEL=y

2
soc/arc/quark_se_c1000_ss/Kconfig.soc
View file

@ -1,7 +1,7 @@
config SOC_QUARK_SE_C1000_SS
bool "Intel Quark SE C1000- Sensor Sub System"
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
select SYS_POWER_DEEP_SLEEP_SUPPORTED

4
soc/arc/quark_se_c1000_ss/power.c
View file

@ -42,7 +42,7 @@ static void _deep_sleep(enum power_states state)
void sys_set_power_state(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATE))
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS:
qm_ss_power_cpu_ss1(QM_SS_POWER_CPU_SS1_TIMER_ON);
break;
@ -69,7 +69,7 @@ void sys_set_power_state(enum power_states state)
void sys_power_state_post_ops(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATE))
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS_1:
{
/* Expire the timer as it is disabled in SS2. */

2
soc/arm/atmel_sam/sam3x/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_SAM3X
bool "Atmel SAM3X MCU"
select CPU_CORTEX_M3
select SOC_FAMILY_SAM
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select ASF
help

2
soc/arm/atmel_sam/sam4s/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_SAM4S
bool "Atmel SAM4S MCU"
select CPU_CORTEX_M4
select SOC_FAMILY_SAM
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select ASF
help

2
soc/arm/atmel_sam/same70/Kconfig.series
View file

@ -12,7 +12,7 @@ config SOC_SERIES_SAME70
select CPU_HAS_SYSTICK
select ASF
select XIP
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_ARM_MPU
select ARM_MPU
select HAS_SWO

2
soc/arm/atmel_sam0/samd20/Kconfig.series
View file

@ -7,7 +7,7 @@ config SOC_SERIES_SAMD20
bool "Atmel SAMD20 MCU"
select CPU_CORTEX_M0PLUS
select SOC_FAMILY_SAM0
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select ASF

2
soc/arm/atmel_sam0/samd21/Kconfig.series
View file

@ -7,7 +7,7 @@ config SOC_SERIES_SAMD21
bool "Atmel SAMD21 MCU"
select CPU_CORTEX_M0PLUS
select SOC_FAMILY_SAM0
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select ASF

2
soc/arm/cypress/psoc6/Kconfig.series
View file

@ -8,7 +8,7 @@
config SOC_SERIES_PSOC62
bool "Cypress PSoC6 series MCU"
select SOC_FAMILY_PSOC6
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select HAS_CYPRESS_DRIVERS
select SOC_NOINIT_LD

2
soc/arm/microchip_mec/mec1701/Kconfig.series
View file

@ -11,7 +11,7 @@ config SOC_SERIES_MEC1701X
select CPU_CORTEX_M4
select SOC_FAMILY_MEC
select CPU_HAS_SYSTICK
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_FPU
help
Enable support for Microchip MEC Cortex-M4 MCU series

2
soc/arm/nxp_imx/mcimx6x_m4/Kconfig.series
View file

@ -11,7 +11,7 @@ config SOC_SERIES_IMX_6X_M4
select CPU_CORTEX_M4
select HAS_IMX_HAL
select SOC_FAMILY_IMX
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_FPU
select CPU_HAS_SYSTICK
select CLOCK_CONTROL

2
soc/arm/nxp_imx/rt/Kconfig.series
View file

@ -9,7 +9,7 @@ config SOC_SERIES_IMX_RT
bool "i.MX RT Series"
select CPU_CORTEX_M7
select SOC_FAMILY_IMX
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select CLOCK_CONTROL
help

2
soc/arm/nxp_kinetis/k6x/Kconfig.series
View file

@ -9,7 +9,7 @@ config SOC_SERIES_KINETIS_K6X
bool "Kinetis K6x Series MCU"
select CPU_CORTEX_M4
select SOC_FAMILY_KINETIS
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select CPU_HAS_NXP_MPU
select CLOCK_CONTROL

2
soc/arm/nxp_kinetis/kl2x/Kconfig.series
View file

@ -9,7 +9,7 @@ config SOC_SERIES_KINETIS_KL2X
bool "Kinetis KL2x Series MCU"
select CPU_CORTEX_M0PLUS
select SOC_FAMILY_KINETIS
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select CLOCK_CONTROL
help

2
soc/arm/nxp_kinetis/kwx/Kconfig.series
View file

@ -8,7 +8,7 @@
config SOC_SERIES_KINETIS_KWX
bool "Kinetis KWx Series MCU"
select SOC_FAMILY_KINETIS
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select CLOCK_CONTROL
help

2
soc/arm/nxp_lpc/lpc54xxx/Kconfig.series
View file

@ -9,7 +9,7 @@ config SOC_SERIES_LPC54XXX
bool "LPC LPC54xxx Series MCU"
select HAS_MCUX
select SOC_FAMILY_LPC
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
help
Enable support for LPC LPC54XXX MCU series

2
soc/arm/silabs_exx32/efm32hg/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_EFM32HG
select CPU_CORTEX_M
select CPU_CORTEX_M0PLUS
select SOC_FAMILY_EXX32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select HAS_SILABS_GECKO
select SOC_GECKO_CMU

2
soc/arm/silabs_exx32/efm32pg12b/Kconfig.series
View file

@ -12,7 +12,7 @@ config SOC_SERIES_EFM32PG12B
select CPU_CORTEX_M4
select CPU_HAS_FPU
select SOC_FAMILY_EXX32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_CMU

2
soc/arm/silabs_exx32/efm32wg/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_EFM32WG
select CPU_CORTEX_M4
select CPU_HAS_FPU
select SOC_FAMILY_EXX32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select HAS_SILABS_GECKO
select SOC_GECKO_CMU

2
soc/arm/silabs_exx32/efr32fg1p/Kconfig.series
View file

@ -12,7 +12,7 @@ config SOC_SERIES_EFR32FG1P
select CPU_CORTEX_M4
select CPU_HAS_FPU
select SOC_FAMILY_EXX32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_CMU

2
soc/arm/silabs_exx32/efr32mg12p/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_EFR32MG12P
select CPU_CORTEX_M4
select CPU_HAS_FPU
select SOC_FAMILY_EXX32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select HAS_SILABS_GECKO
select HAS_SWO

2
soc/arm/st_stm32/stm32f0/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_STM32F0X
select CPU_CORTEX_M0
select CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_SYSTICK
select HAS_STM32CUBE
select CLOCK_CONTROL_STM32_CUBE if CLOCK_CONTROL

2
soc/arm/st_stm32/stm32f1/Kconfig.series
View file

@ -9,7 +9,7 @@ config SOC_SERIES_STM32F1X
bool "STM32F1x Series MCU"
select CPU_CORTEX_M3
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select HAS_STM32CUBE
select CPU_HAS_SYSTICK
select CLOCK_CONTROL_STM32_CUBE if CLOCK_CONTROL

2
soc/arm/st_stm32/stm32f2/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_STM32F2X
select CPU_CORTEX_M
select CPU_CORTEX_M3
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select HAS_STM32CUBE
select CPU_HAS_SYSTICK
select CLOCK_CONTROL_STM32_CUBE if CLOCK_CONTROL

2
soc/arm/st_stm32/stm32f3/Kconfig.series
View file

@ -9,7 +9,7 @@ config SOC_SERIES_STM32F3X
bool "STM32F3x Series MCU"
select CPU_CORTEX_M4
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select CPU_HAS_FPU
select CPU_HAS_SYSTICK
select HAS_STM32CUBE

2
soc/arm/st_stm32/stm32f4/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_STM32F4X
select CPU_CORTEX_M4
select CPU_HAS_FPU
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select HAS_STM32CUBE
select CPU_HAS_ARM_MPU
select CPU_HAS_SYSTICK

2
soc/arm/st_stm32/stm32f7/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_STM32F7X
select CPU_CORTEX_M7
select CPU_HAS_FPU
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select HAS_STM32CUBE
select CPU_HAS_ARM_MPU
select CPU_HAS_SYSTICK

2
soc/arm/st_stm32/stm32l0/Kconfig.series
View file

@ -10,7 +10,7 @@ config SOC_SERIES_STM32L0X
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_VTOR
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select HAS_STM32CUBE
select CPU_HAS_SYSTICK
select CLOCK_CONTROL_STM32_CUBE if CLOCK_CONTROL

2
soc/arm/st_stm32/stm32l4/Kconfig.series
View file

@ -11,7 +11,7 @@ config SOC_SERIES_STM32L4X
select CPU_CORTEX_M4
select CPU_HAS_FPU
select SOC_FAMILY_STM32
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select HAS_STM32CUBE
select CPU_HAS_ARM_MPU
select CPU_HAS_SYSTICK

2
soc/x86/intel_quark/quark_se/Kconfig.series
View file

@ -11,7 +11,7 @@ config SOC_SERIES_QUARK_SE
select LOAPIC
select LOAPIC_TIMER
select XIP
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED

4
soc/x86/intel_quark/quark_se/power.c
View file

@ -60,7 +60,7 @@ static void _deep_sleep(enum power_states state)
void sys_set_power_state(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATE))
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS:
qm_power_cpu_c1();
break;
@ -85,7 +85,7 @@ void sys_set_power_state(enum power_states state)
void sys_power_state_post_ops(enum power_states state)
{
switch (state) {
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATE))
#if (defined(CONFIG_SYS_POWER_LOW_POWER_STATES))
case SYS_POWER_STATE_CPU_LPS_2:
*_REG_TIMER_ICR = 1U;
case SYS_POWER_STATE_CPU_LPS_1:

2
soc/x86/intel_quark/quark_x1000/Kconfig.series
View file

@ -6,7 +6,7 @@ config SOC_SERIES_QUARK_X1000
select HPET_TIMER
select BOOTLOADER_UNKNOWN
select PCI
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_DEEP_SLEEP_SUPPORTED
select SOC_FAMILY_QUARK
select HAS_I2C_DW

2
soc/x86/intel_quark/quark_x1000/Kconfig.soc
View file

@ -6,7 +6,7 @@ config SOC_QUARK_X1000
select HPET_TIMER
select BOOTLOADER_UNKNOWN
select PCI
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select SYS_POWER_LOW_POWER_STATES_SUPPORTED
select SYS_POWER_DEEP_SLEEP_SUPPORTED
select HAS_I2C_DW
depends on SOC_SERIES_QUARK_X1000

2
tests/kernel/profiling/profiling_api/prj.conf
View file

@ -7,7 +7,7 @@ CONFIG_TEST_HW_STACK_PROTECTION=n
# to check idle thread
CONFIG_SYS_POWER_MANAGEMENT=y
CONFIG_SYS_POWER_LOW_POWER_STATE=y
CONFIG_SYS_POWER_LOW_POWER_STATES=y
CONFIG_IDLE_STACK_SIZE=512
# to check isr