drivers/gpio: stm32: Clarify pin config functions headers

Before updating stm32 pinctrl/gpio drivers to support plain GPIO
feature, rework pin configuration functions headers to provide
more clarity on the arguments and the information they convey:
- pin configuration
- pin function

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2022-03-18 11:14:55 +01:00 committed by Marti Bolivar
commit 79ba037891
3 changed files with 17 additions and 17 deletions

View file

@ -115,7 +115,7 @@ static inline uint32_t stm32_pinval_get(int pin)
* @brief Configure the hardware. * @brief Configure the hardware.
*/ */
static void gpio_stm32_configure_raw(const struct device *dev, int pin, static void gpio_stm32_configure_raw(const struct device *dev, int pin,
int conf, int altf) int conf, int func)
{ {
const struct gpio_stm32_config *cfg = dev->config; const struct gpio_stm32_config *cfg = dev->config;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base; GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
@ -224,7 +224,7 @@ static void gpio_stm32_configure_raw(const struct device *dev, int pin,
} }
int gpio_stm32_configure(const struct device *dev, int pin, int conf, int altf) int gpio_stm32_configure(const struct device *dev, int pin, int conf, int func)
{ {
int ret; int ret;
@ -233,7 +233,7 @@ int gpio_stm32_configure(const struct device *dev, int pin, int conf, int altf)
return ret; return ret;
} }
gpio_stm32_configure_raw(dev, pin, conf, altf); gpio_stm32_configure_raw(dev, pin, conf, func);
return pm_device_runtime_put(dev); return pm_device_runtime_put(dev);
} }

View file

@ -237,10 +237,10 @@ struct gpio_stm32_data {
* @param dev GPIO port device pointer * @param dev GPIO port device pointer
* @param pin IO pin * @param pin IO pin
* @param conf GPIO mode * @param conf GPIO mode
* @param altf Alternate function * @param func Pin function
* *
* @return 0 on success, negative errno code on failure * @return 0 on success, negative errno code on failure
*/ */
int gpio_stm32_configure(const struct device *dev, int pin, int conf, int altf); int gpio_stm32_configure(const struct device *dev, int pin, int conf, int func);
#endif /* ZEPHYR_DRIVERS_GPIO_GPIO_STM32_H_ */ #endif /* ZEPHYR_DRIVERS_GPIO_GPIO_STM32_H_ */

View file

@ -173,7 +173,7 @@ static int stm32_pins_remap(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt)
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
static int stm32_pin_configure(uint32_t pin, uint32_t func, uint32_t altf) static int stm32_pin_configure(uint32_t pin, uint32_t pin_cgf, uint32_t pin_func)
{ {
const struct device *port_device; const struct device *port_device;
@ -187,14 +187,14 @@ static int stm32_pin_configure(uint32_t pin, uint32_t func, uint32_t altf)
return -ENODEV; return -ENODEV;
} }
return gpio_stm32_configure(port_device, STM32_PIN(pin), func, altf); return gpio_stm32_configure(port_device, STM32_PIN(pin), pin_cgf, pin_func);
} }
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
uintptr_t reg) uintptr_t reg)
{ {
uint32_t pin, mux; uint32_t pin, mux;
uint32_t func = 0; uint32_t pin_cgf = 0;
int ret = 0; int ret = 0;
ARG_UNUSED(reg); ARG_UNUSED(reg);
@ -213,16 +213,16 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
uint32_t pupd; uint32_t pupd;
if (STM32_DT_PINMUX_FUNC(mux) == ALTERNATE) { if (STM32_DT_PINMUX_FUNC(mux) == ALTERNATE) {
func = pins[i].pincfg | STM32_MODE_OUTPUT | STM32_CNF_ALT_FUNC; pin_cgf = pins[i].pincfg | STM32_MODE_OUTPUT | STM32_CNF_ALT_FUNC;
} else if (STM32_DT_PINMUX_FUNC(mux) == ANALOG) { } else if (STM32_DT_PINMUX_FUNC(mux) == ANALOG) {
func = pins[i].pincfg | STM32_MODE_INPUT | STM32_CNF_IN_ANALOG; pin_cgf = pins[i].pincfg | STM32_MODE_INPUT | STM32_CNF_IN_ANALOG;
} else if (STM32_DT_PINMUX_FUNC(mux) == GPIO_IN) { } else if (STM32_DT_PINMUX_FUNC(mux) == GPIO_IN) {
func = pins[i].pincfg | STM32_MODE_INPUT; pin_cgf = pins[i].pincfg | STM32_MODE_INPUT;
pupd = func & (STM32_PUPD_MASK << STM32_PUPD_SHIFT); pupd = pin_cgf & (STM32_PUPD_MASK << STM32_PUPD_SHIFT);
if (pupd == STM32_PUPD_NO_PULL) { if (pupd == STM32_PUPD_NO_PULL) {
func = func | STM32_CNF_IN_FLOAT; pin_cgf = pin_cgf | STM32_CNF_IN_FLOAT;
} else { } else {
func = func | STM32_CNF_IN_PUPD; pin_cgf = pin_cgf | STM32_CNF_IN_PUPD;
} }
} else { } else {
/* Not supported */ /* Not supported */
@ -230,9 +230,9 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
} }
#else #else
if (STM32_DT_PINMUX_FUNC(mux) < STM32_ANALOG) { if (STM32_DT_PINMUX_FUNC(mux) < STM32_ANALOG) {
func = pins[i].pincfg | STM32_MODER_ALT_MODE; pin_cgf = pins[i].pincfg | STM32_MODER_ALT_MODE;
} else if (STM32_DT_PINMUX_FUNC(mux) == STM32_ANALOG) { } else if (STM32_DT_PINMUX_FUNC(mux) == STM32_ANALOG) {
func = STM32_MODER_ANALOG_MODE; pin_cgf = STM32_MODER_ANALOG_MODE;
} else { } else {
/* Not supported */ /* Not supported */
__ASSERT_NO_MSG(STM32_DT_PINMUX_FUNC(mux)); __ASSERT_NO_MSG(STM32_DT_PINMUX_FUNC(mux));
@ -242,7 +242,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
pin = STM32PIN(STM32_DT_PINMUX_PORT(mux), pin = STM32PIN(STM32_DT_PINMUX_PORT(mux),
STM32_DT_PINMUX_LINE(mux)); STM32_DT_PINMUX_LINE(mux));
ret = stm32_pin_configure(pin, func, STM32_DT_PINMUX_FUNC(mux)); ret = stm32_pin_configure(pin, pin_cgf, STM32_DT_PINMUX_FUNC(mux));
if (ret < 0) { if (ret < 0) {
return ret; return ret;
} }