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drivers/dai/intel/ssp: Decide about clock gating based on Kconfig

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Instead of using version of the SoC, declare on Kconfig the need for it,
and use this information to decide upon enabling the code or not.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This commit is contained in:
Ederson de Souza 2022-07-28 09:42:12 -07:00 • committed by Anas Nashif
commit 79980f250c
3 changed files with 16 additions and 2 deletions
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7
drivers/dai/intel/ssp/Kconfig.ssp
View file

@ -16,3 +16,10 @@ config DAI_INTEL_SSP
config DAI_SSP_HAS_POWER_CONTROL config DAI_SSP_HAS_POWER_CONTROL
bool "DAI ssp pm_runtime en/dis ssp power" bool "DAI ssp pm_runtime en/dis ssp power"
depends on DAI_INTEL_SSP depends on DAI_INTEL_SSP
if DAI_INTEL_SSP
config DAI_SSP_CLK_FORCE_DYNAMIC_CLOCK_GATING
bool
endif

4
drivers/dai/intel/ssp/ssp.c
View file

@ -677,7 +677,7 @@ static int dai_ssp_poll_for_register_delay(uint32_t reg, uint32_t mask,
static inline void dai_ssp_pm_runtime_dis_ssp_clk_gating(struct dai_intel_ssp *dp, uint32_t index) static inline void dai_ssp_pm_runtime_dis_ssp_clk_gating(struct dai_intel_ssp *dp, uint32_t index)
{ {
#if CONFIG_SOC_INTEL_CAVS_V15 #if CONFIG_DAI_SSP_CLK_FORCE_DYNAMIC_CLOCK_GATING
uint32_t shim_reg; uint32_t shim_reg;
shim_reg = sys_read32(dai_shim_base(dp) + SHIM_CLKCTL) | shim_reg = sys_read32(dai_shim_base(dp) + SHIM_CLKCTL) |
@ -693,7 +693,7 @@ static inline void dai_ssp_pm_runtime_dis_ssp_clk_gating(struct dai_intel_ssp *d
static inline void dai_ssp_pm_runtime_en_ssp_clk_gating(struct dai_intel_ssp *dp, uint32_t index) static inline void dai_ssp_pm_runtime_en_ssp_clk_gating(struct dai_intel_ssp *dp, uint32_t index)
{ {
#if CONFIG_SOC_INTEL_CAVS_V15 #if CONFIG_DAI_SSP_CLK_FORCE_DYNAMIC_CLOCK_GATING
uint32_t shim_reg; uint32_t shim_reg;
shim_reg = sys_read32(dai_shim_base(dp) + SHIM_CLKCTL) & shim_reg = sys_read32(dai_shim_base(dp) + SHIM_CLKCTL) &

7
soc/xtensa/intel_adsp/cavs/Kconfig.defconfig.cavs_v15
View file

@ -33,4 +33,11 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
default 400000000 if XTENSA_TIMER default 400000000 if XTENSA_TIMER
default 19200000 if INTEL_ADSP_TIMER default 19200000 if INTEL_ADSP_TIMER
if DAI_INTEL_SSP
config DAI_SSP_CLK_FORCE_DYNAMIC_CLOCK_GATING
default y
endif # DAI_INTEL_SSP
endif endif