michaelh/zephyr
1
0
Fork 0
Code Releases Activity

boards: nxp: imx8m: remove the UART RDC setup from guide

Browse source 
As the RDC setup has been added in SoC initialization code.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This commit is contained in:
Hou Zhiqiang 2024-01-22 10:22:54 +08:00 • committed by David Leach
commit 795044ec6d
3 changed files with 6 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

4
boards/nxp/imx8mm_evk/doc/index.rst
View file

@ -112,13 +112,13 @@ Use U-Boot to load and kick zephyr.bin:
.. code-block:: console
mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x93c00000
fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x93c00000
Or kick SMP zephyr.bin:
.. code-block:: console
mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000
fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000
Use this configuration to run basic Zephyr applications and kernel tests,

4
boards/nxp/imx8mn_evk/doc/index.rst
View file

@ -82,13 +82,13 @@ Use U-Boot to load and kick zephyr.bin:
.. code-block:: console
mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x93c00000
fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x93c00000
Or kick SMP zephyr.bin:
.. code-block:: console
mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000
fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000
Use this configuration to run basic Zephyr applications and kernel tests,

4
boards/nxp/imx8mp_evk/doc/index.rst
View file

@ -102,13 +102,13 @@ Use U-Boot to load and kick non-smp zephyr.bin:
.. code-block:: console
mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0xc0000000
fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0xc0000000
Or kick SMP zephyr.bin:
.. code-block:: console
mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0xc0000000
fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0xc0000000
Use this configuration to run basic Zephyr applications and kernel tests,
for example, with the :zephyr:code-sample:`synchronization` sample: