From 78606101a0fb69380808bfc481714eb42ae98198 Mon Sep 17 00:00:00 2001
From: Iuliana Prodan <iuliana.prodan@nxp.com>
Date: Fri, 1 Oct 2021 19:00:44 +0300
Subject: [PATCH] dts: xtensa: add device tree for imx8m

Add dtsi file for i.MX8MP board.
This has one HiFi4 core, from Cadence, lx6 compatible
and 2 System RAM.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
---
 dts/xtensa/nxp/nxp_imx8m.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 dts/xtensa/nxp/nxp_imx8m.dtsi

diff --git a/dts/xtensa/nxp/nxp_imx8m.dtsi b/dts/xtensa/nxp/nxp_imx8m.dtsi
new file mode 100644
index 00000000000..d7ab2946f85
--- /dev/null
+++ b/dts/xtensa/nxp/nxp_imx8m.dtsi
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2021 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <xtensa/xtensa.dtsi>
+#include <dt-bindings/i2c/i2c.h>
+#include <mem.h>
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "cdns,tensilica-xtensa-lx6";
+			reg = <0>;
+		};
+	};
+
+	sram0: memory@92400000 {
+		device_type = "memory";
+		compatible = "mmio-sram";
+		reg = <0x92400000 DT_SIZE_K(512)>;
+	};
+
+	sram1: memory@92c00000 {
+		device_type = "memory";
+		compatible = "mmio-sram";
+		reg = <0x92c00000 DT_SIZE_K(512)>;
+	};
+};