arch: riscv: ARCH_EXCEPT macro
Enable ARCH_EXCEPT macro for non-usermode scenario for RISC-V Macro will now raise an illegal instruction exception so that mepc will hold expected value in exception handler, and generated coredump can reconstruct the failing stack Coredump tests running on renode (for RISC-V) can now utilize fatal error path through k_panic Signed-off-by: Mark Holden <mholden@fb.com>
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525c316716
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7803a4e590
4 changed files with 22 additions and 9 deletions
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@ -368,9 +368,7 @@ static inline uint64_t arch_k_cycle_get_64(void)
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return sys_clock_cycle_get_64();
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}
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#ifdef CONFIG_USERSPACE
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#include <arch/riscv/error.h>
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#endif /* CONFIG_USERSPACE */
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#ifdef __cplusplus
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}
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@ -46,8 +46,18 @@ extern "C" {
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CODE_UNREACHABLE; /* LCOV_EXCL_LINE */ \
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} while (false)
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#else
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/*
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* Raise an illegal instruction exception so that mepc will hold expected value in
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* exception handler, and generated coredump can reconstruct the failing stack.
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* Store reason_p in register t6, marker in t5
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*/
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#define ARCH_EXCEPT_MARKER 0x00DEAD00
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#define ARCH_EXCEPT(reason_p) do { \
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z_impl_user_fault(reason_p); \
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__asm__ volatile("addi t5, %[marker], 0" \
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: : [marker] "r" (ARCH_EXCEPT_MARKER)); \
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__asm__ volatile("addi t6, %[reason], 0" \
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: : [reason] "r" (reason_p)); \
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__asm__ volatile("unimp"); \
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} while (false)
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#endif
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