boards: enjoydigital: adopt new zephyr:board directive and role

This updates the documentation of all the EnjoyDigital boards to use
the new `zephyr:board::` directive.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>

boards/enjoydigital/litex_vexriscv/doc/index.rst

@@ -1,7 +1,4 @@
-.. _litex-vexriscv:
-
-LiteX VexRiscv
-##############
+.. zephyr:board:: litex_vexriscv
 
 LiteX VexRiscv is an example of a system on a chip (SoC) that consists of
 a `VexRiscv processor <https://github.com/SpinalHDL/VexRiscv>`_
@@ -20,10 +17,6 @@ LiteX VexRiscv SoC implementation generated for the
 <https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists>`_
 or `SDI-MIPI Video Converter <https://github.com/antmicro/sdi-mipi-video-converter>`_.
 
-.. image:: img/litex_vexriscv.jpg
-   :align: center
-   :alt: LiteX VexRiscv on Digilent Arty 35T Board
-
 LiteX is based on
 `Migen <https://m-labs.hk/gateware/migen/>`_/`MiSoC SoC builder <https://github.com/m-labs/misoc>`_
 and provides ready-made system components such as buses, streams, interconnects,

samples/drivers/clock_control_litex/README.rst

@@ -132,4 +132,5 @@ Sample output
 
 References
 **********
-- :ref:`litex-vexriscv`
+
+- :zephyr:board:`litex_vexriscv`

samples/modules/tflite-micro/magic_wand/README.rst

@@ -32,7 +32,7 @@ Add the tflite-micro module to your West manifest and pull it:
     west config manifest.project-filter -- +tflite-micro
     west update
 
-The application can be built for the :ref:`litex-vexriscv` for
+The application can be built for the :zephyr:board:`litex_vexriscv` for
 emulation in Renode as follows:
 
 .. zephyr-app-commands::