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drivers/clock_control: stm32: Fixes around LSE clock

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Fix macro used in g4 file to enable LSE clock.
Then, to avoid no-op configurations, generate an error
when MSI Hardware auto calibration is selected but LSE
clock is not enabled.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-07-12 17:17:00 +02:00 • committed by Anas Nashif
commit 7650d917a2
2 changed files with 5 additions and 1 deletions
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4
drivers/clock_control/clock_stm32_ll_common.c
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@ -462,6 +462,10 @@ int stm32_clock_control_init(const struct device *dev)
LL_RCC_MSI_SetCalibTrimming(0); LL_RCC_MSI_SetCalibTrimming(0);
#if STM32_MSI_PLL_MODE #if STM32_MSI_PLL_MODE
#ifndef STM32_LSE_CLOCK
#error "MSI Hardware auto calibration requires LSE clock activation"
#endif
/* Enable MSI hardware auto calibration */ /* Enable MSI hardware auto calibration */
LL_RCC_MSI_EnablePLLMode(); LL_RCC_MSI_EnablePLLMode();
#endif #endif

2
drivers/clock_control/clock_stm32g4.c
View file

@ -49,7 +49,7 @@ void config_enable_default_clocks(void)
/* Enable the power interface clock */ /* Enable the power interface clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#ifdef STM32_LSE #ifdef STM32_LSE_CLOCK
/* LSE belongs to the back-up domain, enable access.*/ /* LSE belongs to the back-up domain, enable access.*/
/* Set the DBP bit in the Power control register 1 (PWR_CR1) */ /* Set the DBP bit in the Power control register 1 (PWR_CR1) */