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drivers: pinctrl: Add pinctrl driver for RA8 series

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This is the initial commit to support minimum pinctrl
driver for Renesas MCU RA8M1.

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
This commit is contained in:
Duy Nguyen 2024-01-11 04:51:42 +00:00 • committed by Anas Nashif
commit 75f1f7e982
8 changed files with 274 additions and 0 deletions
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65
soc/renesas/ra/common_fsp/pinctrl_soc.h Normal file
View file

@ -0,0 +1,65 @@
/*
* Copyright (c) 2024 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_SOC_RENESAS_RA_COMMON_PINCTRL_SOC_H_
#define ZEPHYR_SOC_RENESAS_RA_COMMON_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include <zephyr/dt-bindings/pinctrl/renesas/ra-pinctrl.h>
/**
* @brief Type to hold a renesas ra pin's pinctrl configuration.
*/
struct ra_pinctrl_soc_pin {
/** Port number 0..9, A, B */
uint32_t port_num: 4;
/** Pin number 0..15 */
uint32_t pin_num: 4;
/** Register PFS cfg */
uint32_t cfg;
};
typedef struct ra_pinctrl_soc_pin pinctrl_soc_pin_t;
/**
* @brief Utility macro to initialize each pin.
*
* @param node_id Node identifier.
* @param prop Property name.
* @param idx Property entry index.
*/
#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
{ \
.port_num = RA_GET_PORT_NUM(DT_PROP_BY_IDX(node_id, prop, idx)), \
.pin_num = RA_GET_PIN_NUM(DT_PROP_BY_IDX(node_id, prop, idx)), \
.cfg = (DT_PROP(node_id, bias_pull_up) << 4) | \
(DT_PROP(node_id, drive_open_drain) << 6) | \
(DT_ENUM_IDX(node_id, drive_strength) << 10) | \
(RA_GET_MODE(DT_PROP_BY_IDX(node_id, prop, idx)) << 16) | \
(RA_GET_PSEL(DT_PROP_BY_IDX(node_id, prop, idx)) << 24), \
},
/**
* @brief Utility macro to initialize state pins contained in a given property.
*
* @param node_id Node identifier.
* @param prop Property name describing state pins.
*/
#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
{ \
DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, psels, \
Z_PINCTRL_STATE_PIN_INIT) \
}
#define RA_GET_PORT_NUM(pinctrl) (((pinctrl) >> RA_PORT_NUM_POS) & RA_PORT_NUM_MASK)
#define RA_GET_PIN_NUM(pinctrl) (((pinctrl) >> RA_PIN_NUM_POS) & RA_PIN_NUM_MASK)
#define RA_GET_MODE(pinctrl) (((pinctrl) >> RA_MODE_POS) & RA_MODE_MASK)
#define RA_GET_PSEL(pinctrl) (((pinctrl) >> RA_PSEL_POS) & RA_PSEL_MASK)
#endif /* ZEPHYR_SOC_RENESAS_RA_COMMON_PINCTRL_SOC_H_ */

3
soc/renesas/ra/ra8m1/soc.c
View file

@ -23,6 +23,8 @@ LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
/**
* @brief Perform basic hardware initialization at boot.
*
@ -34,6 +36,7 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
static int renesas_ra8m1_init(void)
{
SystemCoreClock = BSP_MOCO_HZ;
g_protect_pfswe_counter = 0;
bsp_clock_init();
return 0;