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include/drivers/clock_control: stm32: Update for STM32F1 support

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Add missing macros fro STM32F1 clock configuration

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-04-13 15:51:32 +02:00 • committed by Carles Cufí
commit 755d09e149
2 changed files with 20 additions and 10 deletions
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8
drivers/clock_control/clock_stm32f1.c
View file

@ -49,12 +49,12 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
* 9 -> LL_RCC_PLL_MUL_9 -> 0x001C0000 * 9 -> LL_RCC_PLL_MUL_9 -> 0x001C0000
* 13 -> LL_RCC_PLL_MUL_6_5 -> 0x00340000 * 13 -> LL_RCC_PLL_MUL_6_5 -> 0x00340000
*/ */
pllinit->PLLMul = ((CONFIG_CLOCK_STM32_PLL_MULTIPLIER - 2) pllinit->PLLMul = ((STM32_PLL_MULTIPLIER - 2)
<< RCC_CFGR_PLLMULL_Pos); << RCC_CFGR_PLLMULL_Pos);
#ifdef CONFIG_SOC_STM32F10X_DENSITY_DEVICE #ifdef CONFIG_SOC_STM32F10X_DENSITY_DEVICE
/* PLL prediv */ /* PLL prediv */
#ifdef CONFIG_CLOCK_STM32_PLL_XTPRE #ifdef STM32_PLL_XTPRE
/* /*
* SOC_STM32F10X_DENSITY_DEVICE: * SOC_STM32F10X_DENSITY_DEVICE:
* PLLXPTRE (depends on PLL source HSE) * PLLXPTRE (depends on PLL source HSE)
@ -68,7 +68,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
* HSE used as direct PLL source * HSE used as direct PLL source
*/ */
pllinit->Prediv = LL_RCC_PREDIV_DIV_1; pllinit->Prediv = LL_RCC_PREDIV_DIV_1;
#endif /* CONFIG_CLOCK_STM32_PLL_XTPRE */ #endif /* STM32_PLL_XTPRE */
#else #else
/* /*
* SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE * SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
@ -78,7 +78,7 @@ void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
* ... * ...
* 16 -> LL_RCC_PREDIV_DIV_16 -> 0x0000000F * 16 -> LL_RCC_PREDIV_DIV_16 -> 0x0000000F
*/ */
pllinit->Prediv = CONFIG_CLOCK_STM32_PLL_PREDIV1 - 1; pllinit->Prediv = STM32_PLL_PREDIV1 - 1;
#endif /* CONFIG_SOC_STM32F10X_DENSITY_DEVICE */ #endif /* CONFIG_SOC_STM32F10X_DENSITY_DEVICE */
} }

22
include/drivers/clock_control/stm32_clock_control.h
View file

@ -82,6 +82,18 @@
#define STM32_PLL_R_DIVISOR CONFIG_CLOCK_STM32_PLL_R_DIVISOR #define STM32_PLL_R_DIVISOR CONFIG_CLOCK_STM32_PLL_R_DIVISOR
#endif #endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay)
#define STM32_PLL_XTPRE DT_PROP(DT_NODELABEL(pll), xtre)
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay)
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
#define STM32_PLL_PREDIV1 DT_PROP(DT_NODELABEL(pll), prediv)
#else
#define STM32_PLL_XTPRE CONFIG_CLOCK_STM32_PLL_XTPRE
#define STM32_PLL_MULTIPLIER CONFIG_CLOCK_STM32_PLL_MULTIPLIER
#define STM32_PLL_PREDIV1 CONFIG_CLOCK_STM32_PLL_PREDIV1
#endif
#define DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc)) #define DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc))
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32_rcc, okay) && \ #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rcc), st_stm32_rcc, okay) && \
@ -105,20 +117,18 @@
#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay) || \ #if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \ DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay)) && \ DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay)) && \
DT_NODE_HAS_PROP(DT_NODELABEL(pll), clocks) DT_NODE_HAS_PROP(DT_NODELABEL(pll), clocks)
#define STM32_PLL_SRC_MSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi)) #define STM32_PLL_SRC_MSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
#define STM32_PLL_SRC_HSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi)) #define STM32_PLL_SRC_HSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_PLL_SRC_HSE DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hse)) #define STM32_PLL_SRC_HSE DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
#define STM32_PLL_SRC_PLL2 DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(pll2))
#else #else
#define STM32_PLL_SRC_MSI CONFIG_CLOCK_STM32_PLL_SRC_MSI #define STM32_PLL_SRC_MSI CONFIG_CLOCK_STM32_PLL_SRC_MSI
#define STM32_PLL_SRC_HSI CONFIG_CLOCK_STM32_PLL_SRC_HSI #define STM32_PLL_SRC_HSI CONFIG_CLOCK_STM32_PLL_SRC_HSI
#define STM32_PLL_SRC_HSE CONFIG_CLOCK_STM32_PLL_SRC_HSE #define STM32_PLL_SRC_HSE CONFIG_CLOCK_STM32_PLL_SRC_HSE
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay)
#define STM32_PLL_SRC_PLL2 DT_SAME_NODE(DT_CLOCKS_CTLR(DT_NODELABEL(pll)), DT_NODELABEL(pll2))
#else
#define STM32_PLL_SRC_PLL2 CONFIG_CLOCK_STM32_PLL_SRC_PLL2 #define STM32_PLL_SRC_PLL2 CONFIG_CLOCK_STM32_PLL_SRC_PLL2
#endif #endif