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tests: arch: arm_irq_vector_table: minor inline comment updates

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Distinguish between nRF51/nRF52 and nRF53 platforms in the
inline comments when definining the built-time asserts for
the test.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2020-02-19 10:23:52 +01:00 • committed by Johan Hedberg
commit 7544823731
1 changed files with 4 additions and 4 deletions
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8
tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c
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@ -17,14 +17,14 @@
#define _ISR_OFFSET 0 #define _ISR_OFFSET 0
#if defined(CONFIG_SOC_SERIES_NRF51X) || defined(CONFIG_SOC_SERIES_NRF52X) #if defined(CONFIG_SOC_SERIES_NRF51X) || defined(CONFIG_SOC_SERIES_NRF52X)
/* The customized solution for nRF5X-based platforms /* The customized solution for nRF51X-based and nRF52X-based
* requires that the POWER_CLOCK_IRQn line equals 0. * platforms requires that the POWER_CLOCK_IRQn line equals 0.
*/ */
BUILD_ASSERT_MSG(POWER_CLOCK_IRQn == 0, BUILD_ASSERT_MSG(POWER_CLOCK_IRQn == 0,
"POWER_CLOCK_IRQn != 0. Consider rework manual vector table."); "POWER_CLOCK_IRQn != 0. Consider rework manual vector table.");
/* The customized solution for nRF5X-based platforms /* The customized solution for nRF51X-based and nRF52X-based
* requires that the RTC1 IRQ line equals 17. * platforms requires that the RTC1 IRQ line equals 17.
*/ */
BUILD_ASSERT_MSG(RTC1_IRQn == 17, BUILD_ASSERT_MSG(RTC1_IRQn == 17,
"RTC1_IRQn != 17. Consider rework manual vector table."); "RTC1_IRQn != 17. Consider rework manual vector table.");