From 7521971de8b88f75219b3c24a4668662968e32d8 Mon Sep 17 00:00:00 2001 From: Camille BAUD Date: Fri, 25 Apr 2025 16:47:22 +0200 Subject: [PATCH] dts: bflb: Enable efuse driver on bl60x This enables the driver by default, it will be needed at init in the future Signed-off-by: Camille BAUD --- dts/riscv/bflb/bl60x.dtsi | 7 +++++++ soc/bflb/bl60x/Kconfig | 7 ++++--- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/dts/riscv/bflb/bl60x.dtsi b/dts/riscv/bflb/bl60x.dtsi index 7ec4c90802f..451f69fba80 100644 --- a/dts/riscv/bflb/bl60x.dtsi +++ b/dts/riscv/bflb/bl60x.dtsi @@ -83,6 +83,13 @@ }; }; + efuse: efuse@40007000 { + compatible = "bflb,efuse"; + reg = <0x40007000 0x1000>; + status = "okay"; + size = <128>; + }; + uart0: uart@4000a000 { compatible = "bflb,uart"; reg = <0x4000a000 0x100>; diff --git a/soc/bflb/bl60x/Kconfig b/soc/bflb/bl60x/Kconfig index fa9b22d1f57..c0eef1517f0 100644 --- a/soc/bflb/bl60x/Kconfig +++ b/soc/bflb/bl60x/Kconfig @@ -3,6 +3,9 @@ # SPDX-License-Identifier: Apache-2.0 config SOC_SERIES_BL60X + select ATOMIC_OPERATIONS_C + select CPU_HAS_FPU + select INCLUDE_RESET_VECTOR select RISCV select RISCV_MACHINE_TIMER select RISCV_ISA_RV32I @@ -11,8 +14,6 @@ config SOC_SERIES_BL60X select RISCV_ISA_EXT_C select RISCV_ISA_EXT_ZICSR select RISCV_ISA_EXT_ZIFENCEI - select ATOMIC_OPERATIONS_C - select CPU_HAS_FPU - select INCLUDE_RESET_VECTOR select SOC_EARLY_INIT_HOOK + select SYSCON select XIP