boards: nrf9160dk: Add support for newer revisions (0.14.0+) of the DK
Use the multiple board revisions feature to provide support for the new hardware possibilities available in nRF9160 DK starting from v0.14.0. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
parent
71223ad0d0
commit
75135e87d9
20 changed files with 305 additions and 23 deletions
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@ -9,6 +9,7 @@
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#include <drivers/gpio.h>
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#include <devicetree.h>
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#include <logging/log.h>
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#include <hal/nrf_gpio.h>
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LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_NRF9160DK_LOG_LEVEL);
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@ -22,7 +23,16 @@ LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_NRF9160DK_LOG_LEVEL);
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DT_GPIO_FLAGS_BY_IDX(DT_NODELABEL(name), prop, idx)
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#define GET_DEV(name, prop, idx) DEVICE_DT_GET(GET_CTLR(name, prop, idx))
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#define USE_RESET_GPIO DT_NODE_HAS_STATUS(DT_NODELABEL(reset_input), okay)
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/* If the GPIO pin selected to be the reset line is actually the pin that
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* exposes the nRESET function (P0.18 in nRF52840), there is no need to
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* provide any additional GPIO configuration for it.
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*/
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#define RESET_INPUT_IS_PINRESET (IS_ENABLED(CONFIG_GPIO_AS_PINRESET) && \
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GET_PORT(reset_input, gpios, 0) == 0 && \
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GET_PIN(reset_input, gpios, 0) == 18)
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#define USE_RESET_GPIO \
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(DT_NODE_HAS_STATUS(DT_NODELABEL(reset_input), okay) && \
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!RESET_INPUT_IS_PINRESET)
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struct switch_cfg {
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const struct device *gpio;
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@ -77,6 +87,9 @@ static const struct switch_cfg routing_switches[] = {
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ROUTING_SWITCH(nrf_interface_pins_0_2_routing)
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ROUTING_SWITCH(nrf_interface_pins_3_5_routing)
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ROUTING_SWITCH(nrf_interface_pins_6_8_routing)
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ROUTING_SWITCH(nrf_interface_pin_9_routing)
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ROUTING_SWITCH(io_expander_pins_routing)
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ROUTING_SWITCH(external_flash_pins_routing)
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};
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#if USE_RESET_GPIO
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@ -197,3 +210,32 @@ static int init(const struct device *dev)
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}
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SYS_INIT(init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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#define EXT_MEM_CTRL DT_NODELABEL(external_flash_pins_routing)
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#if DT_NODE_EXISTS(EXT_MEM_CTRL)
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static int early_init(const struct device *dev)
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{
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/* As soon as possible after the system starts up, enable the analog
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* switch that routes signals to the external flash. Otherwise, the
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* HOLD line in the flash chip may not be properly pulled up internally
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* and consequently the chip will not respond to any command.
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* Later on, during the normal initialization performed above, this
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* analog switch will get configured according to what is selected
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* in devicetree.
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*/
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uint32_t psel = NRF_DT_GPIOS_TO_PSEL(EXT_MEM_CTRL, control_gpios);
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gpio_dt_flags_t flags = DT_GPIO_FLAGS(EXT_MEM_CTRL, control_gpios);
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if (flags & GPIO_ACTIVE_LOW) {
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nrf_gpio_pin_clear(psel);
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} else {
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nrf_gpio_pin_set(psel);
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}
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nrf_gpio_cfg_output(psel);
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return 0;
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}
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SYS_INIT(early_init, PRE_KERNEL_1, 0);
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#endif
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@ -130,8 +130,9 @@ such as LEDs and buttons, UART interfaces (VCOMx) of the interface MCU, and
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specific nRF52840 SoC pins.
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.. note::
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nRF9160 signals routed to other components on the DK are not simultaneously
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available on the DK connectors.
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In nRF9160 DK revisions earlier than v0.14.0, nRF9160 signals routed to
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other components on the DK are not simultaneously available on the DK
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connectors.
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When compiling a project for nrf9160dk_nrf52840, the board controller firmware
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will be compiled and run automatically after the Kernel has been initialized.
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@ -208,6 +209,20 @@ on the nRF9160 DK:
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| ``nrf_interface_pins_6_8_routing`` | nRF_IF6-8_CTRL (nRF91_COEX) |
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+------------------------------------+------------------------------+
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When building for the DK revision 0.14.0 or later, you can use the following
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additional nodes (see :ref:`application_board_version` for information how to
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build for specific revisions of the board):
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+------------------------------------+------------------------------+
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| Devicetree node label | Analog switch name |
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+====================================+==============================+
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| ``nrf_interface_pin_9_routing`` | nRF_IF9_CTRL |
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+------------------------------------+------------------------------+
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| ``io_expander_pins_routing`` | IO_EXP_EN |
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+------------------------------------+------------------------------+
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| ``external_flash_pins_routing`` | EXT_MEM_CTRL |
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+------------------------------------+------------------------------+
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For example, if you want to enable the optional routing for the nRF9160 pins
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P0.17, P0.18, and P0.19 so that they are routed to nRF52840 pins P0.17, P0.20,
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and P0.15, respectively, add the following in the devicetree overlay in your
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@ -10,16 +10,17 @@ description: |
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This interface can be used for inter-SoC communication on the DK.
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The connections are as follows:
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| nRF9160 | | nRF52840 |
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| P0.17 | -- nRF interface line 0 -- | P0.17 |
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| P0.18 | -- nRF interface line 1 -- | P0.20 |
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| P0.19 | -- nRF interface line 2 -- | P0.15 |
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| P0.21 | -- nRF interface line 3 -- | P0.22 |
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| P0.22 | -- nRF interface line 4 -- | P1.04 |
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| P0.23 | -- nRF interface line 5 -- | P1.02 |
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| COEX0 | -- nRF interface line 6 -- | P1.13 |
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| COEX1 | -- nRF interface line 7 -- | P1.11 |
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| COEX2 | -- nRF interface line 8 -- | P1.15 |
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| nRF9160 | | nRF52840 |
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| P0.17 | -- nRF interface line 0 -- | P0.17 |
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| P0.18 | -- nRF interface line 1 -- | P0.20 |
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| P0.19 | -- nRF interface line 2 -- | P0.15 |
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| P0.21 | -- nRF interface line 3 -- | P0.22 |
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| P0.22 | -- nRF interface line 4 -- | P1.04 |
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| P0.23 | -- nRF interface line 5 -- | P1.02 |
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| COEX0 | -- nRF interface line 6 -- | P1.13 |
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| COEX1 | -- nRF interface line 7 -- | P1.11 |
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| COEX2 | -- nRF interface line 8 -- | P1.15 |
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| P0.24 | -- nRF interface line 9 -- | P0.18 (nRESET) | (in v0.14.0 or later)
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Before particular lines of this interface can be used, the corresponding
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analog switches that control the routing of involved nRF9160 pins must be
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@ -29,6 +30,12 @@ description: |
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- `nrf_interface_pins_0_2_routing` to enable lines 0-2
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- `nrf_interface_pins_3_5_routing` to enable lines 3-5
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- `nrf_interface_pins_6_8_routing` to enable lines 6-8
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- `nrf_interface_pin_9_routing` to enable line 9 (this line is only
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available in nRF9160 DK v0.14.0 or later)
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NOTE: In nRF9160 DK revisions earlier than v0.14.0, when the above signals
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from nRF9160 are routed to nRF52840, they are not available on the DK
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connectors.
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compatible: "nordic,nrf9160dk-nrf52840-interface"
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@ -0,0 +1,16 @@
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* NOTE: this feature is only available in nRF9160 DK v0.14.0 or later. */
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&nrf_interface_pin_9_routing {
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status = "okay";
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};
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&reset_input {
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status = "okay";
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gpios = <&interface_to_nrf9160 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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};
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# This file is required by the multiple board revisions mechanism.
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@ -0,0 +1,51 @@
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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board-control {
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nrf_interface_pin_9_routing: switch-nrf-if9-ctrl {
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compatible = "nordic,nrf9160dk-optional-routing";
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control-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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};
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io_expander_pins_routing: switch-io-exp-en {
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compatible = "nordic,nrf9160dk-optional-routing";
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control-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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};
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external_flash_pins_routing: switch-ext-mem-ctrl {
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compatible = "nordic,nrf9160dk-optional-routing";
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control-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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};
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};
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};
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&interface_to_nrf9160 {
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gpio-map = <0 0 &gpio0 17 0>,
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<1 0 &gpio0 20 0>,
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<2 0 &gpio0 15 0>,
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<3 0 &gpio0 22 0>,
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<4 0 &gpio1 4 0>,
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<5 0 &gpio1 2 0>,
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<6 0 &gpio1 13 0>,
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<7 0 &gpio1 11 0>,
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<8 0 &gpio1 15 0>,
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/* New signal added in this revision (0.14.0). */
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<9 0 &gpio0 18 0>; /* nReset */
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};
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&vcom2_pins_routing {
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/* No need to drive P0.12 together with P1.12 in this board revision. */
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control-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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&reset_input {
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/* By default use the dedicated connection to the nRESET (P0.18) pin. */
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gpios = <&interface_to_nrf9160 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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};
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# This file is required by the multiple board revisions mechanism.
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7
boards/arm/nrf9160dk_nrf52840/revision.cmake
Normal file
7
boards/arm/nrf9160dk_nrf52840/revision.cmake
Normal file
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@ -0,0 +1,7 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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board_check_revision(
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FORMAT MAJOR.MINOR.PATCH
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DEFAULT_REVISION 0.7.0
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)
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@ -83,6 +83,31 @@ hardware features:
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| WDT | on-chip | watchdog |
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+-----------+------------+----------------------+
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.. _nrf9160dk_additional_hardware:
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Additional hardware in v0.14.0+
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-------------------------------
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Starting from v0.14.0, additional hardware is available on the DK:
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* External flash memory (MX25R6435F, 64 Mb)
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* I/O expander (PCAL6408A) that can be used to interface LEDs, slide switches,
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and buttons
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To use this additional hardware, specify the revision of the board that
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should be used when building your application (for more information, see
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:ref:`application_board_version`). For example, to build for nRF9160 DK v1.0.0:
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.. zephyr-app-commands::
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:tool: all
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:cd-into:
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:board: nrf9160dk_nrf9160@1.0.0
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:goals: build
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:compact:
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Remember to also enable routing for this additional hardware in the firmware for
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:ref:`nrf9160dk_nrf52840` (see :ref:`nrf9160dk_board_controller_firmware`).
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Other hardware features are not supported by the Zephyr kernel.
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See `nRF9160 DK website`_ and `Nordic Semiconductor Infocenter`_
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for a complete list of nRF9160 DK board hardware features.
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@ -10,16 +10,17 @@ description: |
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This interface can be used for inter-SoC communication on the DK.
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The connections are as follows:
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| nRF9160 | | nRF52840 |
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| P0.17 | -- nRF interface line 0 -- | P0.17 |
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| P0.18 | -- nRF interface line 1 -- | P0.20 |
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| P0.19 | -- nRF interface line 2 -- | P0.15 |
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| P0.21 | -- nRF interface line 3 -- | P0.22 |
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| P0.22 | -- nRF interface line 4 -- | P1.04 |
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| P0.23 | -- nRF interface line 5 -- | P1.02 |
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| COEX0 | -- nRF interface line 6 -- | P1.13 |
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| COEX1 | -- nRF interface line 7 -- | P1.11 |
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| COEX2 | -- nRF interface line 8 -- | P1.15 |
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| nRF9160 | | nRF52840 |
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| P0.17 | -- nRF interface line 0 -- | P0.17 |
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| P0.18 | -- nRF interface line 1 -- | P0.20 |
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| P0.19 | -- nRF interface line 2 -- | P0.15 |
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| P0.21 | -- nRF interface line 3 -- | P0.22 |
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| P0.22 | -- nRF interface line 4 -- | P1.04 |
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| P0.23 | -- nRF interface line 5 -- | P1.02 |
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| COEX0 | -- nRF interface line 6 -- | P1.13 |
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| COEX1 | -- nRF interface line 7 -- | P1.11 |
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| COEX2 | -- nRF interface line 8 -- | P1.15 |
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| P0.24 | -- nRF interface line 9 -- | P0.18 (nRESET) | (in v0.14.0 or later)
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Before particular lines of this interface can be used, the corresponding
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analog switches that control the routing of involved nRF9160 pins must be
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@ -29,6 +30,12 @@ description: |
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- `nrf_interface_pins_0_2_routing` to enable lines 0-2
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- `nrf_interface_pins_3_5_routing` to enable lines 3-5
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- `nrf_interface_pins_6_8_routing` to enable lines 6-8
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- `nrf_interface_pin_9_routing` to enable line 9 (this line is only
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available in nRF9160 DK v0.14.0 or later)
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NOTE: In nRF9160 DK revisions earlier than v0.14.0, when the above signals
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from nRF9160 are routed to nRF52840, they are not available on the DK
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connectors.
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compatible: "nordic,nrf9160dk-nrf52840-interface"
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@ -0,0 +1,12 @@
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* NOTE: this feature is only available in nRF9160 DK v0.14.0 or later. */
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&nrf52840_reset {
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status = "okay";
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gpios = <&interface_to_nrf52840 9 GPIO_ACTIVE_LOW>;
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};
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# This file is required by the multiple board revisions mechanism.
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@ -0,0 +1,7 @@
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "nrf9160dk_nrf9160_common_0_14_0.dtsi"
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# This file is required by the multiple board revisions mechanism.
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@ -0,0 +1,47 @@
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&interface_to_nrf52840 {
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gpio-map = <0 0 &gpio0 17 0>,
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<1 0 &gpio0 18 0>,
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<2 0 &gpio0 19 0>,
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<3 0 &gpio0 21 0>,
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<4 0 &gpio0 22 0>,
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<5 0 &gpio0 23 0>,
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/* 6: COEX0 */
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/* 7: COEX1 */
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/* 8: COEX2 */
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<9 0 &gpio0 24 0>;
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};
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&nrf52840_reset {
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gpios = <&interface_to_nrf52840 9 GPIO_ACTIVE_LOW>;
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};
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&spi3 {
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status = "okay";
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sck-pin = <13>;
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mosi-pin = <11>;
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miso-pin = <12>;
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cs-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
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mx25r64: mx25r6435f@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <8000000>;
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label = "MX25R64";
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jedec-id = [c2 28 17];
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sfdp-bfp = [
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e5 20 f1 ff ff ff ff 03 44 eb 08 6b 08 3b 04 bb
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ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
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10 d8 00 ff 23 72 f5 00 82 ed 04 cc 44 83 68 44
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30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff
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];
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size = <67108864>;
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has-dpd;
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t-enter-dpd = <10000>;
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t-exit-dpd = <35000>;
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};
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};
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# This file is required by the multiple board revisions mechanism.
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@ -0,0 +1,7 @@
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "nrf9160dk_nrf9160_common_0_14_0.dtsi"
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# This file is required by the multiple board revisions mechanism.
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7
boards/arm/nrf9160dk_nrf9160/revision.cmake
Normal file
7
boards/arm/nrf9160dk_nrf9160/revision.cmake
Normal file
|
@ -0,0 +1,7 @@
|
|||
# Copyright (c) 2021 Nordic Semiconductor ASA
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
board_check_revision(
|
||||
FORMAT MAJOR.MINOR.PATCH
|
||||
DEFAULT_REVISION 0.7.0
|
||||
)
|
|
@ -0,0 +1,8 @@
|
|||
/*
|
||||
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/* Use the reset line that is available starting from v0.14.0 of the DK. */
|
||||
#include <nrf9160dk_nrf52840_reset_on_if9.dtsi>
|
Loading…
Add table
Add a link
Reference in a new issue