From 74b0b4116710f9176e027fc9196eca8a3c5a7849 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Fri, 23 Oct 2020 15:10:05 +0200 Subject: [PATCH] boards: stm32: Convert I2S users to dt based pinctrl config I2S signals should now be configured using dt. For nucleo_f411re, I2S pins were configured using SPI definitions that pulled the same strings behind the scene as I2S would have done. This being said, only CK and SD pins should be needed and were documented, so I only left those. Signed-off-by: Erwan Gouriou --- boards/arm/96b_argonkey/96b_argonkey.dts | 1 + boards/arm/96b_argonkey/pinmux.c | 4 ---- boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts | 1 + boards/arm/96b_stm32_sensor_mez/pinmux.c | 4 ---- boards/arm/nucleo_f411re/nucleo_f411re.dts | 4 ++++ boards/arm/nucleo_f411re/pinmux.c | 7 ------- 6 files changed, 6 insertions(+), 15 deletions(-) diff --git a/boards/arm/96b_argonkey/96b_argonkey.dts b/boards/arm/96b_argonkey/96b_argonkey.dts index 4955d5fbf66..92a27a1fbd3 100644 --- a/boards/arm/96b_argonkey/96b_argonkey.dts +++ b/boards/arm/96b_argonkey/96b_argonkey.dts @@ -83,6 +83,7 @@ &i2s5 { status = "okay"; + pinctrl-0 = <&i2s5_ck_pb0 &i2s5_sd_pb8>; mp34dt05@0 { compatible = "st,mpxxdtyy"; diff --git a/boards/arm/96b_argonkey/pinmux.c b/boards/arm/96b_argonkey/pinmux.c index b876ac6c9ae..6b8b146ea9a 100644 --- a/boards/arm/96b_argonkey/pinmux.c +++ b/boards/arm/96b_argonkey/pinmux.c @@ -14,10 +14,6 @@ /* pin assignments for 96boards Argonkey board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s5), okay) && CONFIG_I2S - {STM32_PIN_PB0, STM32F4_PINMUX_FUNC_PB0_I2S5_CK}, - {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2S5_SD}, -#endif }; static int pinmux_stm32_init(const struct device *port) diff --git a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts index 5dd54150062..26ed3dcbf93 100644 --- a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts +++ b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts @@ -92,6 +92,7 @@ }; &i2s2 { + pinctrl-0 = <&i2s2_ck_pc7 &i2s2_sd_pc1>; status = "okay"; }; diff --git a/boards/arm/96b_stm32_sensor_mez/pinmux.c b/boards/arm/96b_stm32_sensor_mez/pinmux.c index c93d1e8409b..262916f353f 100644 --- a/boards/arm/96b_stm32_sensor_mez/pinmux.c +++ b/boards/arm/96b_stm32_sensor_mez/pinmux.c @@ -14,10 +14,6 @@ /* pin assignments for 96b_stm32_sensor_mez board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s2), okay) && CONFIG_I2S - {STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_I2S2_CK}, - {STM32_PIN_PC1, STM32F4_PINMUX_FUNC_PC1_I2S2_SD}, -#endif }; static int pinmux_stm32_init(const struct device *port) diff --git a/boards/arm/nucleo_f411re/nucleo_f411re.dts b/boards/arm/nucleo_f411re/nucleo_f411re.dts index 8261b6bcfce..1bd86637ce9 100644 --- a/boards/arm/nucleo_f411re/nucleo_f411re.dts +++ b/boards/arm/nucleo_f411re/nucleo_f411re.dts @@ -70,6 +70,10 @@ clock-frequency = ; }; +&i2s1 { + pinctrl-0 = <&i2s1_ck_pa5 &i2s1_sd_pa7>; +}; + &spi1 { pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; diff --git a/boards/arm/nucleo_f411re/pinmux.c b/boards/arm/nucleo_f411re/pinmux.c index 30bb07870d5..b137aadc6dd 100644 --- a/boards/arm/nucleo_f411re/pinmux.c +++ b/boards/arm/nucleo_f411re/pinmux.c @@ -14,13 +14,6 @@ /* pin assignments for NUCLEO-F411RE board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s1), okay) && CONFIG_I2S - {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, - - {STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK}, - {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, - {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, -#endif }; static int pinmux_stm32_init(const struct device *port)