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drivers: dma: add generic driver support for some series of stm32

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This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.

Notice due to some bugs, this is currently not working with f7.

There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.

Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.

This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.

Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.

This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
This commit is contained in:
Song Qiang 2019-10-24 19:06:19 +08:00 • committed by Kumar Gala
commit 749d2d21bf
27 changed files with 1307 additions and 698 deletions
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33
drivers/dma/dma_stm32.h Normal file
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/*
* Copyright (c) 2019 Song Qiang <songqiang1304521@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <drivers/dma.h>
#include <soc.h>
extern u32_t table_ll_stream[];
extern u32_t (*func_ll_is_active_tc[])(DMA_TypeDef *DMAx);
extern void (*func_ll_clear_tc[])(DMA_TypeDef *DMAx);
extern u32_t (*func_ll_is_active_ht[])(DMA_TypeDef *DMAx);
extern void (*func_ll_clear_ht[])(DMA_TypeDef *DMAx);
#ifdef CONFIG_DMA_STM32_V1
extern u32_t table_ll_channel[];
#endif
void stm32_dma_dump_stream_irq(DMA_TypeDef *dma, u32_t id);
void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, u32_t id);
bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, u32_t id);
bool stm32_dma_is_unexpected_irq_happened(DMA_TypeDef *dma, u32_t id);
void stm32_dma_enable_stream(DMA_TypeDef *dma, u32_t id);
int stm32_dma_disable_stream(DMA_TypeDef *dma, u32_t id);
void stm32_dma_enable_fifo(DMA_TypeDef *dma, u32_t id);
void stm32_dma_config_channel_function(DMA_TypeDef *dma, u32_t id, u32_t slot);
#ifdef CONFIG_DMA_STM32_V1
void stm32_dma_disable_fifo_irq(DMA_TypeDef *dma, u32_t id);
bool stm32_dma_check_fifo_mburst(LL_DMA_InitTypeDef *DMAx);
u32_t stm32_dma_get_fifo_threshold(u16_t fifo_mode_control);
u32_t stm32_dma_get_mburst(struct dma_config *config, bool source_periph);
u32_t stm32_dma_get_pburst(struct dma_config *config, bool source_periph);
#endif