arm: move z_arch_switch_to_main_thread to C code
There's no compelling reason why this should be inline unlike all other arches, it's a large function, called exactly once. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie
Anas Nashif
parent
54506b5a9b
commit
747fec226c
2 changed files with 97 additions and 92 deletions
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@ -379,3 +379,95 @@ int z_arch_float_disable(struct k_thread *thread)
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return 0;
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return 0;
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}
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}
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#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */
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#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */
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void z_arch_switch_to_main_thread(struct k_thread *main_thread,
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k_thread_stack_t *main_stack,
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size_t main_stack_size,
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k_thread_entry_t _main)
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{
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#if defined(CONFIG_FLOAT)
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/* Initialize the Floating Point Status and Control Register when in
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* Unshared FP Registers mode (In Shared FP Registers mode, FPSCR is
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* initialized at thread creation for threads that make use of the FP).
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*/
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__set_FPSCR(0);
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#if defined(CONFIG_FP_SHARING)
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/* In Sharing mode clearing FPSCR may set the CONTROL.FPCA flag. */
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__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
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__ISB();
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#endif /* CONFIG_FP_SHARING */
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#endif /* CONFIG_FLOAT */
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#ifdef CONFIG_ARM_MPU
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/* Configure static memory map. This will program MPU regions,
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* to set up access permissions for fixed memory sections, such
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* as Application Memory or No-Cacheable SRAM area.
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*
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* This function is invoked once, upon system initialization.
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*/
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z_arm_configure_static_mpu_regions();
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#endif
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/* get high address of the stack, i.e. its start (stack grows down) */
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char *start_of_main_stack;
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start_of_main_stack =
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Z_THREAD_STACK_BUFFER(main_stack) + main_stack_size;
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start_of_main_stack = (char *)STACK_ROUND_DOWN(start_of_main_stack);
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_current = main_thread;
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#ifdef CONFIG_TRACING
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sys_trace_thread_switched_in();
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#endif
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/* the ready queue cache already contains the main thread */
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#ifdef CONFIG_ARM_MPU
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/*
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* If stack protection is enabled, make sure to set it
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* before jumping to thread entry function
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*/
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z_arm_configure_dynamic_mpu_regions(main_thread);
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#endif
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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/* Set PSPLIM register for built-in stack guarding of main thread. */
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#if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
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__set_PSPLIM((u32_t)main_stack);
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#else
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#error "Built-in PSP limit checks not supported by HW"
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#endif
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#endif /* CONFIG_BUILTIN_STACK_GUARD */
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/*
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* Set PSP to the highest address of the main stack
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* before enabling interrupts and jumping to main.
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*/
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__asm__ volatile (
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"mov r0, %0\n\t" /* Store _main in R0 */
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#if defined(CONFIG_CPU_CORTEX_M)
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"msr PSP, %1\n\t" /* __set_PSP(start_of_main_stack) */
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#endif
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) \
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|| defined(CONFIG_ARMV7_R)
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"cpsie i\n\t" /* __enable_irq() */
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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"cpsie if\n\t" /* __enable_irq(); __enable_fault_irq() */
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"mov r1, #0\n\t"
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"msr BASEPRI, r1\n\t" /* __set_BASEPRI(0) */
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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"isb\n\t"
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"movs r1, #0\n\t"
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"movs r2, #0\n\t"
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"movs r3, #0\n\t"
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"bl z_thread_entry\n\t" /* z_thread_entry(_main, 0, 0, 0); */
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:
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: "r" (_main), "r" (start_of_main_stack)
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);
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CODE_UNREACHABLE;
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}
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@ -43,98 +43,6 @@ static ALWAYS_INLINE void z_arch_kernel_init(void)
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z_arm_clear_faults();
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z_arm_clear_faults();
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}
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}
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static ALWAYS_INLINE void
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z_arch_switch_to_main_thread(struct k_thread *main_thread,
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k_thread_stack_t *main_stack,
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size_t main_stack_size, k_thread_entry_t _main)
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{
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#if defined(CONFIG_FLOAT)
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/* Initialize the Floating Point Status and Control Register when in
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* Unshared FP Registers mode (In Shared FP Registers mode, FPSCR is
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* initialized at thread creation for threads that make use of the FP).
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*/
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__set_FPSCR(0);
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#if defined(CONFIG_FP_SHARING)
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/* In Sharing mode clearing FPSCR may set the CONTROL.FPCA flag. */
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__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
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__ISB();
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#endif /* CONFIG_FP_SHARING */
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#endif /* CONFIG_FLOAT */
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#ifdef CONFIG_ARM_MPU
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/* Configure static memory map. This will program MPU regions,
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* to set up access permissions for fixed memory sections, such
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* as Application Memory or No-Cacheable SRAM area.
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*
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* This function is invoked once, upon system initialization.
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*/
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z_arm_configure_static_mpu_regions();
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#endif
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/* get high address of the stack, i.e. its start (stack grows down) */
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char *start_of_main_stack;
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start_of_main_stack =
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Z_THREAD_STACK_BUFFER(main_stack) + main_stack_size;
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start_of_main_stack = (char *)STACK_ROUND_DOWN(start_of_main_stack);
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_current = main_thread;
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#ifdef CONFIG_TRACING
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sys_trace_thread_switched_in();
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#endif
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/* the ready queue cache already contains the main thread */
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#ifdef CONFIG_ARM_MPU
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/*
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* If stack protection is enabled, make sure to set it
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* before jumping to thread entry function
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*/
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z_arm_configure_dynamic_mpu_regions(main_thread);
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#endif
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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/* Set PSPLIM register for built-in stack guarding of main thread. */
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#if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
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__set_PSPLIM((u32_t)main_stack);
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#else
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#error "Built-in PSP limit checks not supported by HW"
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#endif
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#endif /* CONFIG_BUILTIN_STACK_GUARD */
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/*
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* Set PSP to the highest address of the main stack
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* before enabling interrupts and jumping to main.
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*/
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__asm__ volatile (
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"mov r0, %0 \n\t" /* Store _main in R0 */
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#if defined(CONFIG_CPU_CORTEX_M)
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"msr PSP, %1 \n\t" /* __set_PSP(start_of_main_stack) */
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#endif
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) \
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|| defined(CONFIG_ARMV7_R)
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"cpsie i \n\t" /* __enable_irq() */
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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"cpsie if \n\t" /* __enable_irq(); __enable_fault_irq() */
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"mov r1, #0 \n\t"
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"msr BASEPRI, r1 \n\t" /* __set_BASEPRI(0) */
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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"isb \n\t"
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"movs r1, #0 \n\t"
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"movs r2, #0 \n\t"
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"movs r3, #0 \n\t"
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"bl z_thread_entry \n\t" /* z_thread_entry(_main, 0, 0, 0); */
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:
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: "r" (_main), "r" (start_of_main_stack)
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);
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CODE_UNREACHABLE;
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}
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static ALWAYS_INLINE void
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static ALWAYS_INLINE void
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z_arch_thread_return_value_set(struct k_thread *thread, unsigned int value)
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z_arch_thread_return_value_set(struct k_thread *thread, unsigned int value)
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{
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{
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@ -150,6 +58,11 @@ extern FUNC_NORETURN void z_arm_userspace_enter(k_thread_entry_t user_entry,
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extern void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
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extern void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
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extern void z_arch_switch_to_main_thread(struct k_thread *main_thread,
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k_thread_stack_t *main_stack,
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size_t main_stack_size,
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k_thread_entry_t _main);
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#endif /* _ASMLANGUAGE */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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#ifdef __cplusplus
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