esp32s2: drivers: spi: add driver support

and hooks to spi_loopback test.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira 2021-10-01 16:55:37 -03:00 committed by Christopher Friedt
commit 7468121f19
7 changed files with 60 additions and 2 deletions

View file

@ -47,3 +47,23 @@
&trng0 { &trng0 {
status = "okay"; status = "okay";
}; };
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
miso-pin = <13>;
mosi-pin = <11>;
sclk-pin = <12>;
csel-pin = <10>;
};
&spi3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
miso-pin = <37>;
mosi-pin = <35>;
sclk-pin = <36>;
csel-pin = <34>;
};

View file

@ -5,7 +5,7 @@
menuconfig ESP32_SPIM menuconfig ESP32_SPIM
bool "ESP32 SPI Master driver" bool "ESP32 SPI Master driver"
depends on SOC_ESP32 depends on SOC_ESP32 || SOC_ESP32S2
default y default y
help help
Enables support for ESP32 SPI Master driver. Enables support for ESP32 SPI Master driver.

View file

@ -22,6 +22,7 @@ LOG_MODULE_REGISTER(esp32_spi, CONFIG_SPI_LOG_LEVEL);
#include "spi_esp32_spim.h" #include "spi_esp32_spim.h"
/* pins, signals and interrupts shall be placed into dts */ /* pins, signals and interrupts shall be placed into dts */
#if defined(CONFIG_SOC_ESP32)
#define MISO_IDX_2 HSPIQ_IN_IDX #define MISO_IDX_2 HSPIQ_IN_IDX
#define MISO_IDX_3 VSPIQ_IN_IDX #define MISO_IDX_3 VSPIQ_IN_IDX
#define MOSI_IDX_2 HSPID_OUT_IDX #define MOSI_IDX_2 HSPID_OUT_IDX
@ -30,6 +31,16 @@ LOG_MODULE_REGISTER(esp32_spi, CONFIG_SPI_LOG_LEVEL);
#define SCLK_IDX_3 VSPICLK_OUT_IDX #define SCLK_IDX_3 VSPICLK_OUT_IDX
#define CSEL_IDX_2 HSPICS0_OUT_IDX #define CSEL_IDX_2 HSPICS0_OUT_IDX
#define CSEL_IDX_3 VSPICS0_OUT_IDX #define CSEL_IDX_3 VSPICS0_OUT_IDX
#elif defined(CONFIG_SOC_ESP32S2)
#define MISO_IDX_2 FSPIQ_IN_IDX
#define MISO_IDX_3 SPI3_Q_IN_IDX
#define MOSI_IDX_2 FSPID_OUT_IDX
#define MOSI_IDX_3 SPI3_D_OUT_IDX
#define SCLK_IDX_2 FSPICLK_OUT_MUX_IDX
#define SCLK_IDX_3 SPI3_CLK_OUT_MUX_IDX
#define CSEL_IDX_2 FSPICS0_OUT_IDX
#define CSEL_IDX_3 SPI3_CS0_OUT_IDX
#endif
static bool spi_esp32_transfer_ongoing(struct spi_esp32_data *data) static bool spi_esp32_transfer_ongoing(struct spi_esp32_data *data)
{ {

View file

@ -139,6 +139,27 @@
label = "TRNG_0"; label = "TRNG_0";
status = "disabled"; status = "disabled";
}; };
spi2: spi@3f424000 {
compatible = "espressif,esp32-spi";
reg = <0x3f424000 DT_SIZE_K(4)>;
interrupts = <SPI2_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "SPI_2";
clocks = <&rtc ESP32_FSPI_MODULE>;
status = "disabled";
use-iomux;
};
spi3: spi@3f425000 {
compatible = "espressif,esp32-spi";
reg = <0x3f425000 DT_SIZE_K(4)>;
interrupts = <SPI3_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "SPI_3";
clocks = <&rtc ESP32_HSPI_MODULE>;
status = "disabled";
};
}; };
}; };

View file

@ -25,6 +25,10 @@ extern void esp_rom_uart_tx_wait_idle(uint8_t uart_no);
extern STATUS esp_rom_uart_tx_one_char(uint8_t chr); extern STATUS esp_rom_uart_tx_one_char(uint8_t chr);
extern STATUS esp_rom_uart_rx_one_char(uint8_t *chr); extern STATUS esp_rom_uart_rx_one_char(uint8_t *chr);
extern int esp_rom_gpio_matrix_in(uint32_t gpio, uint32_t signal_index, bool inverted);
extern int esp_rom_gpio_matrix_out(uint32_t gpio, uint32_t signal_index,
bool out_invrted, bool out_enabled_inverted);
/* cache related rom functions */ /* cache related rom functions */
extern uint32_t esp_rom_Cache_Disable_ICache(void); extern uint32_t esp_rom_Cache_Disable_ICache(void);
extern uint32_t esp_rom_Cache_Disable_DCache(void); extern uint32_t esp_rom_Cache_Disable_DCache(void);

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@ -0,0 +1,2 @@
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_3"
CONFIG_SPI_ESP32_INTERRUPT=y

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@ -62,7 +62,7 @@ manifest:
groups: groups:
- hal - hal
- name: hal_espressif - name: hal_espressif
revision: 051266aafbd966825bad1d9b5ab98e8bed45b918 revision: 8265fef8d88746c3ebb1a3c28917f2762bdecfe8
path: modules/hal/espressif path: modules/hal/espressif
west-commands: west/west-commands.yml west-commands: west/west-commands.yml
groups: groups: