diff --git a/drivers/spi/Kconfig.sam b/drivers/spi/Kconfig.sam
index 79c2563510e..7ff38249fe8 100644
--- a/drivers/spi/Kconfig.sam
+++ b/drivers/spi/Kconfig.sam
@@ -1,5 +1,6 @@
 # Atmel SAM SPI
 
+# Copyright (c) 2019 Gerson Fernando Budke
 # Copyright (c) 2018 qianfan Zhao
 # SPDX-License-Identifier: Apache-2.0
 
@@ -13,86 +14,126 @@ menuconfig SPI_SAM
 config SPI_SAM_PORT_0
 	bool "Enable SPI0"
 	depends on SPI_SAM
+	select SPI_0
 	help
 	  Enable SPI0 at boot
 
 if SPI_SAM_PORT_0
 
-config SPI_SAME70_PORT_0_PIN_CS0
+choice SPI_SAM_PORT_0_PIN_CS0
 	bool "CS0 pin"
+	optional
 	depends on SOC_SERIES_SAME70
 
-choice SPI_SAME70_PORT_0_PIN_CS1
+	config SPI_SAM_PORT_0_PIN_CS0_PB2
+		bool "PB2"
+		depends on SOC_SERIES_SAME70
+
+endchoice
+
+choice SPI_SAM_PORT_0_PIN_CS1
 	bool "CS1 pin"
 	optional
 	depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_0_PIN_CS1_PA31
+	config SPI_SAM_PORT_0_PIN_CS1_PA31
 		bool "PA31"
+		depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_0_PIN_CS1_PD25
+	config SPI_SAM_PORT_0_PIN_CS1_PD25
 		bool "PD25"
+		depends on SOC_SERIES_SAME70
 
 endchoice
 
-config SPI_SAME70_PORT_0_PIN_CS2
+choice SPI_SAM_PORT_0_PIN_CS2
 	bool "CS2 pin"
+	optional
 	depends on SOC_SERIES_SAME70
 
-config SPI_SAME70_PORT_0_PIN_CS3
+	config SPI_SAM_PORT_0_PIN_CS2_PD12
+		bool "PD12"
+		depends on SOC_SERIES_SAME70
+
+endchoice
+
+choice SPI_SAM_PORT_0_PIN_CS3
 	bool "CS3 pin"
+	optional
 	depends on SOC_SERIES_SAME70
 
+	config SPI_SAM_PORT_0_PIN_CS3_PD27
+		bool "PD27"
+		depends on SOC_SERIES_SAME70
+
+endchoice
+
 endif # SPI_SAM_PORT_0
 
 config SPI_SAM_PORT_1
 	bool "Enable SPI1"
-	depends on SPI_SAM
+	depends on SPI_SAM && \
+		   SOC_SERIES_SAME70
+	select SPI_1
 	help
 	  Enable SPI1 at boot
 
 if SPI_SAM_PORT_1
 
-config SPI_SAME70_PORT_1_PIN_CS0
+choice SPI_SAM_PORT_1_PIN_CS0
 	bool "CS0 pin"
+	optional
 	depends on SOC_SERIES_SAME70
 
-choice SPI_SAME70_PORT_1_PIN_CS1
+	config SPI_SAM_PORT_1_PIN_CS0_PC25
+		bool "PC25"
+		depends on SOC_SERIES_SAME70
+
+endchoice
+
+choice SPI_SAM_PORT_1_PIN_CS1
 	prompt "CS1 pin"
 	optional
 	depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_1_PIN_CS1_PC28
+	config SPI_SAM_PORT_1_PIN_CS1_PC28
 		bool "PC28"
+		depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_1_PIN_CS1_PD0
+	config SPI_SAM_PORT_1_PIN_CS1_PD0
 		bool "PD0"
+		depends on SOC_SERIES_SAME70
 
 endchoice
 
-choice SPI_SAME70_PORT_1_PIN_CS2
+choice SPI_SAM_PORT_1_PIN_CS2
 	prompt "CS2 pin"
 	optional
 	depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_1_PIN_CS2_PC29
+	config SPI_SAM_PORT_1_PIN_CS2_PC29
 		bool "PC29"
+		depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_1_PIN_CS2_PD1
+	config SPI_SAM_PORT_1_PIN_CS2_PD1
 		bool "PD1"
+		depends on SOC_SERIES_SAME70
 
 endchoice
 
-choice SPI_SAME70_PORT_1_PIN_CS3
+choice SPI_SAM_PORT_1_PIN_CS3
 	prompt "CS3 pin"
 	optional
 	depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_1_PIN_CS3_PC30
+	config SPI_SAM_PORT_1_PIN_CS3_PC30
 		bool "PC30"
+		depends on SOC_SERIES_SAME70
 
-	config SPI_SAME70_PORT_1_PIN_CS3_PD2
+	config SPI_SAM_PORT_1_PIN_CS3_PD2
 		bool "PD2"
+		depends on SOC_SERIES_SAME70
 
 endchoice
+
 endif # SPI_SAM_PORT_1
diff --git a/soc/arm/atmel_sam/same70/soc_pinmap.h b/soc/arm/atmel_sam/same70/soc_pinmap.h
index 34c0c54272e..cbcd635c22d 100644
--- a/soc/arm/atmel_sam/same70/soc_pinmap.h
+++ b/soc/arm/atmel_sam/same70/soc_pinmap.h
@@ -137,19 +137,19 @@
 
 /* Serial Peripheral Interface (SPI) */
 
-#ifdef CONFIG_SPI_SAME70_PORT_0_PIN_CS0
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PB2
 #define PIN_SPI0_CS0 {PIO_PB2D_SPI0_NPCS0,  PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_0_PIN_CS1_PA31
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
 #define PIN_SPI0_CS1 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_0_PIN_CS1_PD25
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25
 #define PIN_SPI0_CS1 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_0_PIN_CS2
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PD12
 #define PIN_SPI0_CS2 {PIO_PD12C_SPI0_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_0_PIN_CS3
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PD27
 #define PIN_SPI0_CS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
 #endif
 
@@ -157,25 +157,25 @@
 	(PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK)
 #define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
 
-#ifdef CONFIG_SPI_SAME70_PORT_0_PIN_CS0
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS0_PC25
 #define PIN_SPI1_CS0 {PIO_PC25C_SPI1_NPCS0, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_1_PIN_CS1_PC28
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PC28
 #define PIN_SPI1_CS1_PC28 {PIO_PC28C_SPI1_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_1_PIN_CS1_PD0
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PD0
 #define PIN_SPI1_CS1_PD0  {PIO_PD0C_SPI1_NPCS1,  PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_1_PIN_CS2_PC29
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PC29
 #define PIN_SPI1_CS2_PC29 {PIO_PC29C_SPI1_NPCS2, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_1_PIN_CS2_PD1
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PD1
 #define PIN_SPI1_CS2_PD1  {PIO_PD1C_SPI1_NPCS2,  PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_1_PIN_CS3_PC30
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PC30
 #define PIN_SPI1_CS3_PC30 {PIO_PC30C_SPI1_NPCS3, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
 #endif
-#ifdef CONFIG_SPI_SAME70_PORT_1_PIN_CS3_PD2
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PD2
 #define PIN_SPI1_CS3_PD2  {PIO_PD2C_SPI1_NPCS3,  PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
 #endif