diff --git a/arch/arm/configs/micro_basic_cortex_m3_defconfig b/arch/arm/configs/micro_basic_cortex_m3_defconfig index 470cb1ee947..60ee63ad9ee 100644 --- a/arch/arm/configs/micro_basic_cortex_m3_defconfig +++ b/arch/arm/configs/micro_basic_cortex_m3_defconfig @@ -84,7 +84,7 @@ CONFIG_CPU_CORTEX_M3_M4=y CONFIG_CPU_CORTEX_M3=y # -# ARM Cortex-M family options +# ARM Cortex-M options # CONFIG_LDREX_STREX_AVAILABLE=y CONFIG_DATA_ENDIANNESS_LITTLE=y @@ -93,6 +93,10 @@ CONFIG_STACK_GROWS_DOWN=y CONFIG_NUM_IRQ_PRIO_BITS=3 # CONFIG_RUNTIME_NMI is not set CONFIG_FAULT_DUMP=2 +CONFIG_SRAM_SIZE=64 +CONFIG_SRAM_BASE_ADDRESS=0x20000000 +CONFIG_FLASH_SIZE=256 +CONFIG_FLASH_BASE_ADDRESS=0x00000000 # # ARM Cortex-M3/M4 options diff --git a/arch/arm/configs/micro_fsl_frdm_k64f_defconfig b/arch/arm/configs/micro_fsl_frdm_k64f_defconfig index 5a629046b28..b02ca77f72a 100644 --- a/arch/arm/configs/micro_fsl_frdm_k64f_defconfig +++ b/arch/arm/configs/micro_fsl_frdm_k64f_defconfig @@ -84,7 +84,7 @@ CONFIG_CPU_CORTEX_M3_M4=y CONFIG_CPU_CORTEX_M4=y # -# ARM Cortex-M family options +# ARM Cortex-M options # CONFIG_LDREX_STREX_AVAILABLE=y CONFIG_DATA_ENDIANNESS_LITTLE=y @@ -93,6 +93,10 @@ CONFIG_STACK_GROWS_DOWN=y CONFIG_NUM_IRQ_PRIO_BITS=4 # CONFIG_RUNTIME_NMI is not set CONFIG_FAULT_DUMP=2 +CONFIG_SRAM_SIZE=192 +CONFIG_SRAM_BASE_ADDRESS=0x20000000 +CONFIG_FLASH_SIZE=1024 +CONFIG_FLASH_BASE_ADDRESS=0x00000000 # # ARM Cortex-M3/M4 options diff --git a/arch/arm/configs/nano_basic_cortex_m3_defconfig b/arch/arm/configs/nano_basic_cortex_m3_defconfig index 1c77d93d6c0..35a37cddbf4 100644 --- a/arch/arm/configs/nano_basic_cortex_m3_defconfig +++ b/arch/arm/configs/nano_basic_cortex_m3_defconfig @@ -63,7 +63,7 @@ CONFIG_CPU_CORTEX_M3_M4=y CONFIG_CPU_CORTEX_M3=y # -# ARM Cortex-M family options +# ARM Cortex-M options # CONFIG_LDREX_STREX_AVAILABLE=y CONFIG_DATA_ENDIANNESS_LITTLE=y @@ -72,6 +72,10 @@ CONFIG_STACK_GROWS_DOWN=y CONFIG_NUM_IRQ_PRIO_BITS=3 # CONFIG_RUNTIME_NMI is not set CONFIG_FAULT_DUMP=2 +CONFIG_SRAM_SIZE=64 +CONFIG_SRAM_BASE_ADDRESS=0x20000000 +CONFIG_FLASH_SIZE=256 +CONFIG_FLASH_BASE_ADDRESS=0x00000000 # # ARM Cortex-M3/M4 options diff --git a/arch/arm/configs/nano_fsl_frdm_k64f_defconfig b/arch/arm/configs/nano_fsl_frdm_k64f_defconfig index 20bedf2f4a3..8202d7db94f 100644 --- a/arch/arm/configs/nano_fsl_frdm_k64f_defconfig +++ b/arch/arm/configs/nano_fsl_frdm_k64f_defconfig @@ -63,7 +63,7 @@ CONFIG_CPU_CORTEX_M3_M4=y CONFIG_CPU_CORTEX_M4=y # -# ARM Cortex-M family options +# ARM Cortex-M options # CONFIG_LDREX_STREX_AVAILABLE=y CONFIG_DATA_ENDIANNESS_LITTLE=y @@ -72,6 +72,10 @@ CONFIG_STACK_GROWS_DOWN=y CONFIG_NUM_IRQ_PRIO_BITS=4 # CONFIG_RUNTIME_NMI is not set CONFIG_FAULT_DUMP=2 +CONFIG_SRAM_SIZE=192 +CONFIG_SRAM_BASE_ADDRESS=0x20000000 +CONFIG_FLASH_SIZE=1024 +CONFIG_FLASH_BASE_ADDRESS=0x00000000 # # ARM Cortex-M3/M4 options diff --git a/arch/arm/core/cortex_m/Kconfig b/arch/arm/core/cortex_m/Kconfig index c0827582a65..69bb21d348a 100644 --- a/arch/arm/core/cortex_m/Kconfig +++ b/arch/arm/core/cortex_m/Kconfig @@ -52,7 +52,7 @@ config CPU_CORTEX_M4 help This option signifies the use of a Cortex-M4 CPU -menu "ARM Cortex-M family options" +menu "ARM Cortex-M options" depends on CPU_CORTEX_M config LDREX_STREX_AVAILABLE @@ -119,6 +119,37 @@ config FAULT_DUMP config XIP default y +config SRAM_SIZE + int "SRAM Size in kB" + default 192 + help + This option specifies the size of the SRAM in kB. It is normally set by + the platform's defconfig file and the user should generally avoid modifying + it via the menu configuration. + +config SRAM_BASE_ADDRESS + hex "SRAM Base Address" + default 0x20000000 + help + This option specifies the base address of the SRAM on the platform. It is + normally set by the platform's defconfig file and the user should generally + avoid modifying it via the menu configuration. + +config FLASH_SIZE + int "Flash Size in kB" + default 1024 + help + This option specifies the size of the flash in kB. It is normally set by + the platform's defconfig file and the user should generally avoid modifying + it via the menu configuration. + +config FLASH_BASE_ADDRESS + hex "Flash Base Address" + default 0x00000000 + help + This option specifies the base address of the flash on the platform. It is + normally set by the platform's defconfig file and the user should generally + avoid modifying it via the menu configuration. endmenu menu "ARM Cortex-M3/M4 options" diff --git a/arch/arm/defconfig b/arch/arm/defconfig index 5a629046b28..b02ca77f72a 100644 --- a/arch/arm/defconfig +++ b/arch/arm/defconfig @@ -84,7 +84,7 @@ CONFIG_CPU_CORTEX_M3_M4=y CONFIG_CPU_CORTEX_M4=y # -# ARM Cortex-M family options +# ARM Cortex-M options # CONFIG_LDREX_STREX_AVAILABLE=y CONFIG_DATA_ENDIANNESS_LITTLE=y @@ -93,6 +93,10 @@ CONFIG_STACK_GROWS_DOWN=y CONFIG_NUM_IRQ_PRIO_BITS=4 # CONFIG_RUNTIME_NMI is not set CONFIG_FAULT_DUMP=2 +CONFIG_SRAM_SIZE=192 +CONFIG_SRAM_BASE_ADDRESS=0x20000000 +CONFIG_FLASH_SIZE=1024 +CONFIG_FLASH_BASE_ADDRESS=0x00000000 # # ARM Cortex-M3/M4 options