diff --git a/boards/arm/rddrone_fmuk66/CMakeLists.txt b/boards/arm/rddrone_fmuk66/CMakeLists.txt new file mode 100644 index 00000000000..6040b7754b0 --- /dev/null +++ b/boards/arm/rddrone_fmuk66/CMakeLists.txt @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_PINMUX_MCUX) + zephyr_library() + zephyr_library_sources(pinmux.c) +endif() diff --git a/boards/arm/rddrone_fmuk66/Kconfig.board b/boards/arm/rddrone_fmuk66/Kconfig.board new file mode 100644 index 00000000000..b6a2829208e --- /dev/null +++ b/boards/arm/rddrone_fmuk66/Kconfig.board @@ -0,0 +1,7 @@ +# Copyright (c) 2021, Electromaticus LLC, 2021 NXP +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_RDDRONE_FMUK66 + bool "NXP RDDRONE-FMUK66" + depends on SOC_SERIES_KINETIS_K6X + select SOC_PART_NUMBER_MK66FN2M0VLQ18 diff --git a/boards/arm/rddrone_fmuk66/Kconfig.defconfig b/boards/arm/rddrone_fmuk66/Kconfig.defconfig new file mode 100644 index 00000000000..90f836da404 --- /dev/null +++ b/boards/arm/rddrone_fmuk66/Kconfig.defconfig @@ -0,0 +1,34 @@ +# RDDRONE-FMUK66 board + +# Copyright (c) 2021, Electromaticus LLC, 2021 NXP +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_RDDRONE_FMUK66 + +config BOARD + default "rddrone_fmuk66" + +config OSC_XTAL0_FREQ + default 16000000 + +config MCG_PRDIV0 + default 0x0 + +config MCG_VDIV0 + default 0x4 + +config MCG_FCRDIV + default 1 + +config TEMP_KINETIS + default y if "$(dt_nodelabel_enabled,adc1)" + depends on SENSOR && ADC + +if NETWORKING + +config NET_L2_ETHERNET + default y if !MODEM + +endif # NETWORKING + +endif # BOARD_RDDRONE_FMUK66 diff --git a/boards/arm/rddrone_fmuk66/board.cmake b/boards/arm/rddrone_fmuk66/board.cmake new file mode 100644 index 00000000000..a8a37d097b9 --- /dev/null +++ b/boards/arm/rddrone_fmuk66/board.cmake @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=MK66FN2M0xxx18") + +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/rddrone_fmuk66/pinmux.c b/boards/arm/rddrone_fmuk66/pinmux.c new file mode 100644 index 00000000000..45e13b6ac09 --- /dev/null +++ b/boards/arm/rddrone_fmuk66/pinmux.c @@ -0,0 +1,154 @@ +/* + * Copyright 2021 Electromaticus LLC, 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +static int rddrone_fmuk66_pinmux_init(const struct device *dev) +{ + ARG_UNUSED(dev); + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(porta), okay) + __unused const struct device *porta = + DEVICE_DT_GET(DT_NODELABEL(porta)); + __ASSERT_NO_MSG(device_is_ready(porta)); +#endif +#if DT_NODE_HAS_STATUS(DT_NODELABEL(portb), okay) + __unused const struct device *portb = + DEVICE_DT_GET(DT_NODELABEL(portb)); + __ASSERT_NO_MSG(device_is_ready(portb)); +#endif +#if DT_NODE_HAS_STATUS(DT_NODELABEL(portc), okay) + __unused const struct device *portc = + DEVICE_DT_GET(DT_NODELABEL(portc)); + __ASSERT_NO_MSG(device_is_ready(portc)); +#endif +#if DT_NODE_HAS_STATUS(DT_NODELABEL(portd), okay) + __unused const struct device *portd = + DEVICE_DT_GET(DT_NODELABEL(portd)); + __ASSERT_NO_MSG(device_is_ready(portd)); +#endif +#if DT_NODE_HAS_STATUS(DT_NODELABEL(porte), okay) + __unused const struct device *porte = + DEVICE_DT_GET(DT_NODELABEL(porte)); + __ASSERT_NO_MSG(device_is_ready(porte)); +#endif + + + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) && CONFIG_SERIAL + /* LPUART0 RX, TX */ + pinmux_pin_set(portd, 8, PORT_PCR_MUX(kPORT_MuxAlt5)); + pinmux_pin_set(portd, 9, PORT_PCR_MUX(kPORT_MuxAlt5)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL + /* UART0 RX, TX */ + pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) && CONFIG_SERIAL + /* UART1 RX, TX */ + pinmux_pin_set(portc, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); + pinmux_pin_set(portc, 4, PORT_PCR_MUX(kPORT_MuxAlt3)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL + /* UART1 RX, TX */ + pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt3)); + pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart4), okay) && CONFIG_SERIAL + /* UART1 RTS, CTS, RX, TX */ + pinmux_pin_set(porte, 27, PORT_PCR_MUX(kPORT_MuxAlt3)); + pinmux_pin_set(portc, 13, PORT_PCR_MUX(kPORT_MuxAlt3)); + pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_MuxAlt3)); + pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAlt3)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan0), okay) && CONFIG_CAN + /* CAN0 TX, RX */ + pinmux_pin_set(portb, 18, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 19, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan1), okay) && CONFIG_CAN + /* CAN1 TX, RX */ + pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c0), okay) && CONFIG_I2C + /* I2C0 SCL, SDA */ + pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt5)); + pinmux_pin_set(porte, 25, PORT_PCR_MUX(kPORT_MuxAlt5)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C + /* I2C0 SCL, SDA */ + pinmux_pin_set(portc, 10, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portc, 11, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi0), okay) && CONFIG_SPI + /* SPI0 CS2, SCK, SIN, SOUT */ + pinmux_pin_set(portc, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portc, 5, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI + /* SPI1 CS0, CS1, SCK, SIN, SOUT */ + pinmux_pin_set(portb, 10, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 9, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 11, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI + /* SPI2 CS0, SCK, SIN, SOUT */ + pinmux_pin_set(portb, 20, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 21, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 22, PORT_PCR_MUX(kPORT_MuxAlt2)); + pinmux_pin_set(portb, 23, PORT_PCR_MUX(kPORT_MuxAlt2)); +#endif + + +#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ftm0), nxp_kinetis_ftm_pwm, okay) && CONFIG_PWM + /* FlexTimer0 Channels for FMU (servo control) */ + /* fmu ch1 */ + pinmux_pin_set(portc, 1, PORT_PCR_MUX(kPORT_MuxAlt4)); + /* fmu ch2 */ + pinmux_pin_set(porta, 4, PORT_PCR_MUX(kPORT_MuxAlt3)); + /* fmu ch3 */ + pinmux_pin_set(portd, 4, PORT_PCR_MUX(kPORT_MuxAlt4)); + /* fmu ch4 */ + pinmux_pin_set(portd, 5, PORT_PCR_MUX(kPORT_MuxAlt4)); +#endif + +#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm, okay) && CONFIG_PWM + /* FlexTimer3 Channels for PWM controlled RGB light and FMU (servo control) */ + /* red */ + pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt4)); + /* green */ + pinmux_pin_set(portc, 9, PORT_PCR_MUX(kPORT_MuxAlt3)); + /* blue */ + pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3)); + /* fmu ch5 */ + pinmux_pin_set(porte, 11, PORT_PCR_MUX(kPORT_MuxAlt6)); + /* fmu ch6 */ + pinmux_pin_set(porte, 12, PORT_PCR_MUX(kPORT_MuxAlt6)); +#endif + + return 0; +} + +SYS_INIT(rddrone_fmuk66_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY); diff --git a/boards/arm/rddrone_fmuk66/rddrone_fmuk66.dts b/boards/arm/rddrone_fmuk66/rddrone_fmuk66.dts new file mode 100644 index 00000000000..30e6af5cb44 --- /dev/null +++ b/boards/arm/rddrone_fmuk66/rddrone_fmuk66.dts @@ -0,0 +1,278 @@ +/* + * Copyright (c) 2021, Electromaticus LLC, 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include + +/ { + model = "NXP RDDRONE FMUK66 board"; + compatible = "nxp,mk66f18", "nxp,k66f", "nxp,k6x"; + + aliases { + led0 = &amber_led; + led1 = &green_led; + pwm-led0 = &red_pwm_led; + pwm-led1 = &green_pwm_led; + pwm-led2 = &blue_pwm_led; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,console = &lpuart0; + zephyr,shell-uart = &lpuart0; + zephyr,uart-pipe = &lpuart0; + zephyr,can-primary = &flexcan0; + }; + + leds { + compatible = "gpio-leds"; + amber_led: led_0 { + gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; + label = "LED_AMB"; + }; + green_led: led_1 { + gpios = <&gpiod 14 GPIO_ACTIVE_LOW>; + label = "LED_GRN"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + red_pwm_led: red_pwm_led { + pwms = <&ftm3 1 15625000 PWM_POLARITY_INVERTED>; + }; + blue_pwm_led: blue_pwm_led { + pwms = <&ftm3 4 15625000 PWM_POLARITY_INVERTED>; + }; + green_pwm_led: green_pwm_led { + pwms = <&ftm3 5 15625000 PWM_POLARITY_INVERTED>; + }; + }; +}; + +&sim { + pllfll-select = ; + er32k-select = ; +}; + +&cpu0 { + clock-frequency = <160000000>; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +&temp1 { + status = "okay"; +}; + +&dac0 { + status = "okay"; + voltage-reference = <2>; +}; + +/* PWM header is powered by FlexTimer 0 for channels 1 to 4 */ +&ftm0 { + status = "okay"; + compatible = "nxp,kinetis-ftm-pwm"; + #pwm-cells = <3>; + pinctrl-0 = <&FTM0_CH0_PTC1 &FTM0_CH1_PTA4 &FTM0_CH4_PTD4 &FTM0_CH5_PTD5>; +}; + + +/* RGB LED powered by FlexTimer 3, and PWM headers for channel 5 and 6 */ +&ftm3 { + status = "okay"; + compatible = "nxp,kinetis-ftm-pwm"; + #pwm-cells = <3>; + pinctrl-0 = <&FTM3_CH3_PTD3 &FTM3_CH4_PTC8 &FTM3_CH5_PTC9 &FTM3_CH6_PTE11 &FTM3_CH7_PTE12>; +}; + +/* LPUART connected to debug header */ +&lpuart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&LPUART0_RX_PTD8 &LPUART0_TX_PTD9>; +}; + +zephyr_udc0: &usbotg { + compatible = "nxp,kinetis-usbd"; + status = "okay"; + num-bidir-endpoints = <8>; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&UART0_RX_PTA1 &UART0_TX_PTA2>; +}; + +&uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&UART1_RX_PTC3 &UART1_TX_PTC4>; +}; + +&uart2 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&UART2_RX_PTD2 &UART2_TX_PTD3>; +}; + +&uart4 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&UART4_RTS_b_PTE27 &UART4_CTS_b_PTC13 &UART4_RX_PTC14 &UART4_TX_PTC15>; +}; + +&usbotg { + compatible = "nxp,kinetis-usbd"; + status = "okay"; + num-bidir-endpoints = <8>; +}; + +&gpioa { + status = "okay"; +}; + +&gpiob { + status = "okay"; +}; + +&gpioc { + status = "okay"; +}; + +&gpiod { + status = "okay"; +}; + +&gpioe { + status = "okay"; +}; + +&flash0 { + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 0x00010000>; + read-only; + }; + + /* + * The flash starting at 0x00010000 and ending at + * 0x0001ffff (sectors 16-31) is reserved for use + * by the application. + */ + storage_partition: partition@1e000 { + label = "storage"; + reg = <0x0001e000 0x00002000>; + }; + + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 0x00060000>; + }; + slot1_partition: partition@80000 { + label = "image-1"; + reg = <0x00080000 0x00060000>; + }; + scratch_partition: partition@e0000 { + label = "image-scratch"; + reg = <0x000e0000 0x00020000>; + }; + }; +}; + +&enet { + status = "okay"; + pinctrl-0 = <&RMII0_RXER_PTA5 &RMII0_RXD1_PTA12 + &RMII0_RXD0_PTA13 &RMII0_CRS_DV_PTA14 + &RMII0_TXEN_PTA15 &RMII0_TXD0_PTA16 + &RMII0_TXD1_PTA17 &RMII0_MDIO_PTB0 + &RMII0_MDC_PTB1>; +}; + +&RMII0_MDIO_PTB0 { + bias-pull-up; + drive-open-drain; +}; + +&flexcan0 { + status = "okay"; + pinctrl-0 = <&CAN0_TX_PTB18 &CAN0_RX_PTB19>; + bus-speed = <125000>; +}; + +&CAN0_RX_PTB19 { + bias-pull-up; +}; + +&flexcan1 { + status = "okay"; + pinctrl-0 = <&CAN1_TX_PTC17 &CAN1_RX_PTC16>; + bus-speed = <125000>; +}; + +&CAN1_RX_PTC16 { + bias-pull-up; +}; + +/* external i2c port */ +&i2c0 { + status = "okay"; + pinctrl-0 = <&I2C0_SCL_PTE24 &I2C0_SDA_PTE25>; +}; + +/* magnetometer (bmm150), barometer (bmp280), pressure (mpl3115), + * secure element (a7102ch) i2c bus + */ +&i2c1 { + status = "okay"; + pinctrl-0 = <&I2C1_SCL_PTC10 &I2C1_SDA_PTC11>; +}; + +/* f-ram spi port */ +&spi0 { + status = "okay"; + pinctrl-0 = <&SPI0_PCS2_PTC2 &SPI0_SCK_PTC5 &SPI0_SOUT_PTC6 &SPI0_SIN_PTC7>; +}; + +/* flash (w25x40), accel, magneto (fxos8700), gyro (fxas2100) */ +&spi1 { + status = "okay"; + pinctrl-0 = <&SPI1_PCS0_PTB10 &SPI1_PCS1_PTB9 &SPI1_SCK_PTB11 + &SPI1_SOUT_PTB16 &SPI1_SIN_PTB17>; +}; + +/* external spi */ +&spi2 { + status = "okay"; + pinctrl-0 = <&SPI2_PCS0_PTB20 &SPI2_SCK_PTB21 &SPI2_SOUT_PTB22 &SPI2_SIN_PTB23>; +}; + +&edma0 { + status = "okay"; +}; + +&pit0 { + status = "okay"; +}; diff --git a/boards/arm/rddrone_fmuk66/rddrone_fmuk66.yaml b/boards/arm/rddrone_fmuk66/rddrone_fmuk66.yaml new file mode 100644 index 00000000000..ecab5d4c34d --- /dev/null +++ b/boards/arm/rddrone_fmuk66/rddrone_fmuk66.yaml @@ -0,0 +1,19 @@ +identifier: rddrone_fmuk66 +name: NXP RDDRONE-FMUK66 +type: mcu +arch: arm +ram: 256 +flash: 2048 +toolchain: + - zephyr + - gnuarmemb +supported: + - can + - counter + - gpio + - i2c + - nvs + - pwm + - spi + - usb_device + - watchdog diff --git a/boards/arm/rddrone_fmuk66/rddrone_fmuk66_defconfig b/boards/arm/rddrone_fmuk66/rddrone_fmuk66_defconfig new file mode 100644 index 00000000000..9f87aeca304 --- /dev/null +++ b/boards/arm/rddrone_fmuk66/rddrone_fmuk66_defconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_MK66F18=y +CONFIG_SOC_SERIES_KINETIS_K6X=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_GPIO=y +CONFIG_PINMUX=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=160000000 +CONFIG_OSC_EXTERNAL=y + +# Enable MPU +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y diff --git a/dts/arm/nxp/MK66FN2M0VLQ18.dtsi b/dts/arm/nxp/MK66FN2M0VLQ18.dtsi new file mode 100644 index 00000000000..dc1c489641f --- /dev/null +++ b/dts/arm/nxp/MK66FN2M0VLQ18.dtsi @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2021 Electromaticus LLC, 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include diff --git a/dts/arm/nxp/nxp_k66.dtsi b/dts/arm/nxp/nxp_k66.dtsi index be249be788f..989374f48b0 100644 --- a/dts/arm/nxp/nxp_k66.dtsi +++ b/dts/arm/nxp/nxp_k66.dtsi @@ -11,3 +11,33 @@ reg = <0x00000000 DT_SIZE_M(2)>; }; +/ { + soc { + lpuart0: lpuart@400c4000 { + compatible = "nxp,kinetis-lpuart"; + reg = <0x400c4000 0x14>; + interrupts = <86 0>; + clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1038 20>; + label = "LPUART_0"; + status = "disabled"; + }; + + flexcan1: can@400a4000 { + compatible = "nxp,kinetis-flexcan"; + reg = <0x400a4000 0x1000>; + interrupts = <94 0>, <95 0>, <96 0>, <97 0>, <98 0>, <99 0>; + interrupt-names = "mb-0-15", "bus-off", "error", "tx-warning", + "rx-warning", "wake-up"; + clocks = <&sim KINETIS_SIM_BUS_CLK 0x1030 4>; + clk-source = <1>; + label = "CAN_1"; + sjw = <1>; + prop-seg = <1>; + phase-seg1 = <3>; + phase-seg2 = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; +}; diff --git a/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk64f12 b/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk64f12 index 9b84b773d88..4e057687125 100644 --- a/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk64f12 +++ b/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk64f12 @@ -8,6 +8,10 @@ if SOC_MK64F12 config SOC default "mk64f12" +config NUM_IRQS + # must be >= the highest interrupt number used + default 86 + config ADC_MCUX_ADC16 default y depends on ADC diff --git a/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk66f18 b/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk66f18 index 5c12a7b8ea8..70c3d11d6c9 100644 --- a/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk66f18 +++ b/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.mk66f18 @@ -1,6 +1,6 @@ # FSL SEGGER K66F platform configuration options -# Copyright (c) 2020 DENX Software Engineering GmbH +# Copyright (c) 2020 DENX Software Engineering GmbH, 2021 Electromaticus LLC, 2021 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_MK66F18 @@ -8,6 +8,22 @@ if SOC_MK66F18 config SOC default "mk66f18" +config NUM_IRQS + # must be >= the highest interrupt number used + default 100 + +config ADC_MCUX_ADC16 + default y + depends on ADC + +config DAC_MCUX_DAC + default y + depends on DAC + +config CAN_MCUX_FLEXCAN + default y + depends on CAN + if CLOCK_CONTROL config CLOCK_CONTROL_MCUX_SIM @@ -18,56 +34,60 @@ config CLOCK_CONTROL_MCUX_MCG endif # CLOCK_CONTROL -if PINMUX - config PINMUX_MCUX default y - -endif # PINMUX + depends on PINMUX config GPIO default y -if GPIO - config GPIO_MCUX default y + depends on GPIO -endif # GPIO +config I2C_MCUX + default y + depends on I2C -if SPI +config PWM_MCUX_FTM + default y + depends on PWM config SPI_MCUX_DSPI default y + depends on SPI -endif # SPI - -if ENTROPY_GENERATOR +config ETH_MCUX + default y + depends on NET_L2_ETHERNET config ENTROPY_MCUX_RNGA default y - -endif # ENTROPY_GENERATOR - -if FLASH + depends on ENTROPY_GENERATOR config SOC_FLASH_MCUX default y + depends on FLASH -endif # FLASH +config UART_MCUX + default y + depends on SERIAL -if WATCHDOG +config USB_KINETIS + default y + depends on USB_DEVICE_DRIVER config WDT_MCUX_WDOG default y - -endif # WATCHDOG - -if COUNTER + depends on WATCHDOG config COUNTER_MCUX_RTC default y + depends on COUNTER + +config UART_MCUX_LPUART + default y + depends on SERIAL -endif # COUNTER endif # SOC_MK66F18 diff --git a/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.series b/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.series index eeb39686020..1b737c0190f 100644 --- a/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.series +++ b/soc/arm/nxp_kinetis/k6x/Kconfig.defconfig.series @@ -8,10 +8,6 @@ if SOC_SERIES_KINETIS_K6X config SOC_SERIES default "k6x" -config NUM_IRQS - # must be >= the highest interrupt number used - default 86 - config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS default y diff --git a/soc/arm/nxp_kinetis/k6x/Kconfig.soc b/soc/arm/nxp_kinetis/k6x/Kconfig.soc index d8c9f7b7fed..42a0cb6891b 100644 --- a/soc/arm/nxp_kinetis/k6x/Kconfig.soc +++ b/soc/arm/nxp_kinetis/k6x/Kconfig.soc @@ -39,8 +39,10 @@ config SOC_MK66F18 select HAS_MCG select CPU_HAS_FPU select HAS_MCUX_RTC + select HAS_MCUX_DAC select HAS_MCUX_EDMA select HAS_MCUX_RCM + select HAS_MCUX_LPUART endchoice @@ -76,6 +78,9 @@ config SOC_PART_NUMBER_MK64FX512VMD12 config SOC_PART_NUMBER_MK66FN2M0VMD18 bool +config SOC_PART_NUMBER_MK66FN2M0VLQ18 + bool + config SOC_PART_NUMBER_KINETIS_K6X string default "MK64FN1M0CAJ12" if SOC_PART_NUMBER_MK64FN1M0CAJ12 @@ -88,6 +93,8 @@ config SOC_PART_NUMBER_KINETIS_K6X default "MK64FX512VLQ12" if SOC_PART_NUMBER_MK64FX512VLQ12 default "MK64FX512VMD12" if SOC_PART_NUMBER_MK64FX512VMD12 default "MK66FN2M0VMD18" if SOC_PART_NUMBER_MK66FN2M0VMD18 + default "MK66FN2M0VLQ18" if SOC_PART_NUMBER_MK66FN2M0VLQ18 + help This string holds the full part number of the SoC. It is a hidden option that you should not set directly. The part number selection choice defines diff --git a/soc/arm/nxp_kinetis/k6x/soc.c b/soc/arm/nxp_kinetis/k6x/soc.c index f4ea9452725..146a38ae890 100644 --- a/soc/arm/nxp_kinetis/k6x/soc.c +++ b/soc/arm/nxp_kinetis/k6x/soc.c @@ -23,6 +23,8 @@ #include #include +#define LPUART0SRC_OSCERCLK (1) + #define TIMESRC_OSCERCLK (2) #define RUNM_HSRUN (3) @@ -101,6 +103,10 @@ static ALWAYS_INLINE void clock_init(void) CLOCK_SetSimConfig(&simConfig); +#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) + CLOCK_SetLpuartClock(LPUART0SRC_OSCERCLK); +#endif + #if CONFIG_ETH_MCUX CLOCK_SetEnetTime0Clock(TIMESRC_OSCERCLK); #endif