From 73e6ca23eb3c6ebca1a4f66cf7a4d5a5a44caad1 Mon Sep 17 00:00:00 2001
From: Shreyas Shankar <s-shankar@ti.com>
Date: Mon, 2 Jun 2025 14:02:29 +0530
Subject: [PATCH] ti: j722s: Fix reg length in pinctrl as per TRM description

In j722s_main.dtsi, the pinctrl block must have reg length 0x2b0
As per TRM, PADCONFIG registers range from 0 to 171.
Thus, length = (171-0+1)*4 = 172*4 = 0x2b0.

Reference: https://www.ti.com/lit/ds/symlink/tda4ven-q1.pdf
Table 5.1 contains data on PADCONFIG registers.

Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
---
 dts/arm/ti/j722s_main.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dts/arm/ti/j722s_main.dtsi b/dts/arm/ti/j722s_main.dtsi
index 64c3918922d..473e327c0fb 100644
--- a/dts/arm/ti/j722s_main.dtsi
+++ b/dts/arm/ti/j722s_main.dtsi
@@ -15,7 +15,7 @@
 
 	pinctrl: pinctrl@f4000 {
 		compatible = "ti,k3-pinctrl";
-		reg = <0x000f4000 0x2ac>;
+		reg = <0x000f4000 0x2b0>;
 		status = "okay";
 	};