arch: arm: cortex_m: Use Thumb-1 compatible 'mov reg, imm' mnemonic
The ARM Thumb-1 instruction set, used by ARMv6-M and ARMv8-M Baseline cores, does not have a valid encoding for "immediate-to-register move without affecting flags" instruction (i.e. `mov reg, imm`), and the only valid variant of immediate-to-register move instruction for it is `movs`, which affects the flags. Since none of the register initialisation instructions used here are flag-sensitive in their context, this commit changes `mov` to `movs`. This fixes the compilation errors with Clang/LLVM, which is more picky about the `mov` mnemonic usage and prints out an "invalid instruction" error when `mov reg, imm` is specified in Thumb-1 mode. Note that GNU assembler implicitly converts `mov reg, imm` to `movs reg, imm` when assembling in Thumb-1 mode. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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1 changed files with 4 additions and 4 deletions
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@ -576,14 +576,14 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
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"mov r4, %0\n" /* force _main to be stored in a register */
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"msr PSP, %1\n" /* __set_PSP(stack_ptr) */
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"mov r0, #0\n" /* arch_irq_unlock(0) */
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"movs r0, #0\n" /* arch_irq_unlock(0) */
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"ldr r3, =arch_irq_unlock_outlined\n"
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"blx r3\n"
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"mov r0, r4\n" /* z_thread_entry(_main, NULL, NULL, NULL) */
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"mov r1, #0\n"
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"mov r2, #0\n"
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"mov r3, #0\n"
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"movs r1, #0\n"
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"movs r2, #0\n"
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"movs r3, #0\n"
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"ldr r4, =z_thread_entry\n"
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"bx r4\n" /* We don’t intend to return, so there is no need to link. */
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:
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