tests: drivers: uart: Add nrf54l09pdk_nrf54l09_cpuapp target
Add new target to the following tests: - uart_elementary - uart_async_api - uart_mix_fifo_poll - uart_pm Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
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@ -0,0 +1,26 @@
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/* SPDX-License-Identifier: Apache-2.0 */
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&pinctrl {
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uart21_default_alt: uart21_default_alt {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>;
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};
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};
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uart21_sleep_alt: uart21_sleep_alt {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>;
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low-power-enable;
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};
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};
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};
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dut: &uart21 {
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status = "okay";
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pinctrl-0 = <&uart21_default_alt>;
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pinctrl-1 = <&uart21_sleep_alt>;
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pinctrl-names = "default", "sleep";
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current-speed = <115200>;
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};
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@ -0,0 +1,31 @@
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/* SPDX-License-Identifier: Apache-2.0 */
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&pinctrl {
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uart21_default: uart21_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>,
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<NRF_PSEL(UART_RTS, 1, 8)>,
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<NRF_PSEL(UART_CTS, 1, 9)>;
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};
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};
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uart21_sleep: uart21_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>,
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<NRF_PSEL(UART_RTS, 1, 8)>,
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<NRF_PSEL(UART_CTS, 1, 9)>;
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low-power-enable;
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};
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};
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};
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dut: &uart21 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart21_default>;
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pinctrl-1 = <&uart21_sleep>;
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pinctrl-names = "default", "sleep";
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hw-flow-control;
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};
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@ -11,6 +11,7 @@ tests:
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filter: CONFIG_SERIAL_SUPPORT_INTERRUPT
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platform_allow:
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- nrf54h20dk/nrf54h20/cpuapp
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54l15dk/nrf54l15/cpuflpr
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@ -0,0 +1,43 @@
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart21_default: uart21_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>,
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<NRF_PSEL(UART_RTS, 1, 8)>,
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<NRF_PSEL(UART_CTS, 1, 9)>;
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};
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};
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uart21_sleep: uart21_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>,
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<NRF_PSEL(UART_RTS, 1, 8)>,
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<NRF_PSEL(UART_CTS, 1, 9)>;
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low-power-enable;
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};
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};
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};
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dut: &uart21 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart21_default>;
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pinctrl-1 = <&uart21_sleep>;
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pinctrl-names = "default", "sleep";
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hw-flow-control;
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};
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counter_dev: &timer00 {
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status = "okay";
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};
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&grtc {
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interrupts = <228 2>;
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};
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@ -9,6 +9,7 @@ common:
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- nrf9160dk/nrf9160
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- nrf5340dk/nrf5340/cpuapp
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- nrf5340bsim/nrf5340/cpuapp
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54l15bsim/nrf54l15/cpuapp
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@ -79,3 +80,6 @@ tests:
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- nrf52840dk/nrf52840
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- nrf5340dk/nrf5340/cpuapp
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- nrf9160dk/nrf9160
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l09pdk/nrf54l09/cpuapp
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@ -0,0 +1,36 @@
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart21_default: uart21_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>;
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};
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};
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uart21_sleep: uart21_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 10)>,
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<NRF_PSEL(UART_RX, 1, 11)>;
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low-power-enable;
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};
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};
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};
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/ {
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chosen {
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zephyr,console = &uart20;
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};
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};
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dut: &uart21 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart21_default>;
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pinctrl-1 = <&uart21_sleep>;
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pinctrl-names = "default", "sleep";
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};
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@ -5,6 +5,7 @@ common:
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harness: ztest
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platform_allow:
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- nrf52840dk/nrf52840
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54l15bsim/nrf54l15/cpuapp
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@ -32,6 +33,7 @@ tests:
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- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
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extra_args: DTC_OVERLAY_FILE="boards/nrf52840dk_nrf52840.overlay;nrf_rx_disable.overlay"
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platform_exclude:
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54l15bsim/nrf54l15/cpuapp
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- CONFIG_UART_0_ENHANCED_POLL_OUT=y
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- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
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platform_exclude:
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54h20dk/nrf54h20/cpuapp
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- CONFIG_UART_0_ENHANCED_POLL_OUT=y
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- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
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platform_exclude:
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54h20dk/nrf54h20/cpuapp
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- CONFIG_UART_0_ENHANCED_POLL_OUT=y
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- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
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platform_exclude:
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- nrf54l09pdk/nrf54l09/cpuapp
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l20pdk/nrf54l20/cpuapp
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- nrf54h20dk/nrf54h20/cpuapp
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