From 72a2ec253ee50620d5503fddd8c52cf09fe78d5b Mon Sep 17 00:00:00 2001 From: Michal Sieron Date: Thu, 14 Apr 2022 14:42:29 +0200 Subject: [PATCH] clock_control: litex: Use register names Use `DT_REG_ADDR_BY_NAME` and `DT_REG_SIZE_BY_NAME` to access register properties from dts. Signed-off-by: Michal Sieron --- drivers/clock_control/clock_control_litex.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clock_control/clock_control_litex.h b/drivers/clock_control/clock_control_litex.h index 7cfd748fcb5..2080c0dacfa 100644 --- a/drivers/clock_control/clock_control_litex.h +++ b/drivers/clock_control/clock_control_litex.h @@ -33,14 +33,14 @@ /* Base address */ #define DRP_BASE DT_REG_ADDR_BY_IDX(MMCM, 0) /* Register address */ -#define DRP_ADDR_RESET DT_REG_ADDR_BY_IDX(MMCM, 0/*DRP_RESET*/) -#define DRP_ADDR_LOCKED DT_REG_ADDR_BY_IDX(MMCM, 1/*DRP_LOCEKD*/) -#define DRP_ADDR_READ DT_REG_ADDR_BY_IDX(MMCM, 2/*DRP_READ*/) -#define DRP_ADDR_WRITE DT_REG_ADDR_BY_IDX(MMCM, 3/*DRP_WRITE*/) -#define DRP_ADDR_DRDY DT_REG_ADDR_BY_IDX(MMCM, 4/*DRP_DRDY*/) -#define DRP_ADDR_ADR DT_REG_ADDR_BY_IDX(MMCM, 5/*DRP_ADR*/) -#define DRP_ADDR_DAT_W DT_REG_ADDR_BY_IDX(MMCM, 6/*DRP_DAT_W*/) -#define DRP_ADDR_DAT_R DT_REG_ADDR_BY_IDX(MMCM, 7/*DRP_DAT_R*/) +#define DRP_ADDR_RESET DT_REG_ADDR_BY_NAME(MMCM, drp_reset) +#define DRP_ADDR_LOCKED DT_REG_ADDR_BY_NAME(MMCM, drp_locked) +#define DRP_ADDR_READ DT_REG_ADDR_BY_NAME(MMCM, drp_read) +#define DRP_ADDR_WRITE DT_REG_ADDR_BY_NAME(MMCM, drp_write) +#define DRP_ADDR_DRDY DT_REG_ADDR_BY_NAME(MMCM, drp_drdy) +#define DRP_ADDR_ADR DT_REG_ADDR_BY_NAME(MMCM, drp_adr) +#define DRP_ADDR_DAT_W DT_REG_ADDR_BY_NAME(MMCM, drp_dat_w) +#define DRP_ADDR_DAT_R DT_REG_ADDR_BY_NAME(MMCM, drp_dat_r) /* Devicetree global defines */ #define LOCK_TIMEOUT DT_PROP(MMCM, litex_lock_timeout)