x86: MMU: Create PAE page structures and unions.
Created structures and unions needed to enable the software to access these tables. Also updated the helper macros to ease the usage of the MMU page tables. JIRA: ZEP-2511 Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
This commit is contained in:
Adithya Baglody
Andrew Boie
parent
d1703691c8
commit
725de70d86
5 changed files with 488 additions and 63 deletions
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@ -21,7 +21,7 @@ MMU_BOOT_REGION((u32_t)&_image_rom_start, (u32_t)&_image_rom_size,
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#ifdef CONFIG_APPLICATION_MEMORY
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/* User threads by default can read/write app-level memory. */
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MMU_BOOT_REGION((u32_t)&__app_ram_start, (u32_t)&__app_ram_size,
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MMU_ENTRY_WRITE | MMU_ENTRY_USER);
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MMU_ENTRY_WRITE | MMU_ENTRY_USER | MMU_ENTRY_EXECUTE_DISABLE);
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#endif
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/* __kernel_ram_size includes all unused memory, which is used for heaps.
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@ -29,15 +29,22 @@ MMU_BOOT_REGION((u32_t)&__app_ram_start, (u32_t)&__app_ram_size,
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* automatically for stacks.
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*/
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MMU_BOOT_REGION((u32_t)&__kernel_ram_start, (u32_t)&__kernel_ram_size,
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MMU_ENTRY_WRITE | MMU_ENTRY_RUNTIME_USER);
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MMU_ENTRY_WRITE |
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MMU_ENTRY_RUNTIME_USER |
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MMU_ENTRY_EXECUTE_DISABLE);
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void _x86_mmu_get_flags(void *addr, u32_t *pde_flags, u32_t *pte_flags)
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void _x86_mmu_get_flags(void *addr,
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x86_page_entry_data_t *pde_flags,
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x86_page_entry_data_t *pte_flags)
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{
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*pde_flags = (x86_page_entry_data_t)(X86_MMU_GET_PDE(addr)->value &
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~(x86_page_entry_data_t)MMU_PDE_PAGE_TABLE_MASK);
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*pde_flags = X86_MMU_GET_PDE(addr)->value & ~MMU_PDE_PAGE_TABLE_MASK;
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if (*pde_flags & MMU_ENTRY_PRESENT) {
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*pte_flags = X86_MMU_GET_PTE(addr)->value & ~MMU_PTE_PAGE_MASK;
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*pte_flags = (x86_page_entry_data_t)
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(X86_MMU_GET_PTE(addr)->value &
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~(x86_page_entry_data_t)MMU_PTE_PAGE_MASK);
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} else {
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*pte_flags = 0;
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}
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@ -50,76 +57,129 @@ int _arch_buffer_validate(void *addr, size_t size, int write)
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u32_t end_pde_num;
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u32_t starting_pte_num;
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u32_t ending_pte_num;
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struct x86_mmu_page_table *pte_address;
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u32_t pde;
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u32_t pte;
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#ifdef CONFIG_X86_PAE_MODE
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union x86_mmu_pae_pte pte_value;
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u32_t start_pdpte_num = MMU_PDPTE_NUM(addr);
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u32_t end_pdpte_num = MMU_PDPTE_NUM((char *)addr + size - 1);
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u32_t pdpte;
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#else
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union x86_mmu_pte pte_value;
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#endif
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struct x86_mmu_page_table *pte_address;
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start_pde_num = MMU_PDE_NUM(addr);
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end_pde_num = MMU_PDE_NUM((char *)addr + size - 1);
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starting_pte_num = MMU_PAGE_NUM((char *)addr);
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/* Iterate for all the pde's the buffer might take up.
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* (depends on the size of the buffer and start address of the buff)
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*/
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for (pde = start_pde_num; pde <= end_pde_num; pde++) {
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union x86_mmu_pde_pt pde_value = X86_MMU_PD->entry[pde].pt;
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if (!pde_value.p || !pde_value.us || (write && !pde_value.rw)) {
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return -EPERM;
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#ifdef CONFIG_X86_PAE_MODE
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for (pdpte = start_pdpte_num; pdpte <= end_pdpte_num; pdpte++) {
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if (pdpte != start_pdpte_num) {
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start_pde_num = 0;
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}
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pte_address = X86_MMU_GET_PT_ADDR(addr);
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/* loop over all the possible page tables for the required
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* size. If the pde is not the last one then the last pte
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* would be 1023. So each pde will be using all the
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* page table entires except for the last pde.
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* For the last pde, pte is calculated using the last
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* memory address of the buffer.
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*/
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if (pde != end_pde_num) {
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ending_pte_num = 1023;
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if (pdpte != end_pdpte_num) {
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end_pde_num = 0;
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} else {
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ending_pte_num = MMU_PAGE_NUM((char *)addr + size - 1);
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end_pde_num = MMU_PDE_NUM((char *)addr + size - 1);
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}
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/* For all the pde's appart from the starting pde, will have
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* the start pte number as zero.
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struct x86_mmu_page_directory *pd_address =
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X86_MMU_GET_PD_ADDR_INDEX(pdpte);
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#endif
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/* Iterate for all the pde's the buffer might take up.
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* (depends on the size of the buffer and start address
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* of the buff)
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*/
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if (pde != start_pde_num) {
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starting_pte_num = 0;
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}
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for (pde = start_pde_num; pde <= end_pde_num; pde++) {
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#ifdef CONFIG_X86_PAE_MODE
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union x86_mmu_pae_pde pde_value =
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pd_address->entry[pde];
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#else
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union x86_mmu_pde_pt pde_value =
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X86_MMU_PD->entry[pde].pt;
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#endif
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pte_value.value = 0xFFFFFFFF;
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if (!pde_value.p ||
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!pde_value.us ||
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(write && !pde_value.rw)) {
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return -EPERM;
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}
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/* Bitwise AND all the pte values. */
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for (pte = starting_pte_num; pte <= ending_pte_num; pte++) {
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pte_value.value &= pte_address->entry[pte].value;
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}
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pte_address = (struct x86_mmu_page_table *)
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(pde_value.page_table << MMU_PAGE_SHIFT);
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if (!pte_value.p || !pte_value.us || (write && !pte_value.rw)) {
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return -EPERM;
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/* loop over all the possible page tables for the
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* required size. If the pde is not the last one
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* then the last pte would be 1023. So each pde
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* will be using all the page table entires except
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* for the last pde. For the last pde, pte is
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* calculated using the last memory address
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* of the buffer.
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*/
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if (pde != end_pde_num) {
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ending_pte_num = 1023;
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} else {
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ending_pte_num =
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MMU_PAGE_NUM((char *)addr + size - 1);
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}
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/* For all the pde's appart from the starting pde,
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* will have the start pte number as zero.
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*/
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if (pde != start_pde_num) {
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starting_pte_num = 0;
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}
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pte_value.value = 0xFFFFFFFF;
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/* Bitwise AND all the pte values.
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* An optimization done to make sure a compare is
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* done only once.
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*/
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for (pte = starting_pte_num;
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pte <= ending_pte_num;
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pte++) {
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pte_value.value &=
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pte_address->entry[pte].value;
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}
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if (!pte_value.p ||
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!pte_value.us ||
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(write && !pte_value.rw)) {
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return -EPERM;
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}
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}
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#ifdef CONFIG_X86_PAE_MODE
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}
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#endif
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return 0;
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}
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static inline void tlb_flush_page(void *addr)
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{
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/* Invalidate TLB entries corresponding to the page containing the
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* specified address
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*/
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char *page = (char *)addr;
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__asm__ ("invlpg %0" :: "m" (*page));
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}
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void _x86_mmu_set_flags(void *ptr, size_t size, u32_t flags, u32_t mask)
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void _x86_mmu_set_flags(void *ptr,
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size_t size,
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x86_page_entry_data_t flags,
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x86_page_entry_data_t mask)
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{
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#ifdef CONFIG_X86_PAE_MODE
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union x86_mmu_pae_pte *pte;
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#else
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union x86_mmu_pte *pte;
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#endif
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u32_t addr = (u32_t)ptr;
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@ -128,9 +188,13 @@ void _x86_mmu_set_flags(void *ptr, size_t size, u32_t flags, u32_t mask)
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while (size) {
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#ifdef CONFIG_X86_PAE_MODE
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/* TODO we're not generating 2MB entries at the moment */
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__ASSERT(X86_MMU_GET_PDE(addr)->ps != 1, "2MB PDE found");
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#else
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/* TODO we're not generating 4MB entries at the moment */
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__ASSERT(X86_MMU_GET_4MB_PDE(addr)->ps != 1, "4MB PDE found");
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#endif
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pte = X86_MMU_GET_PTE(addr);
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pte->value = (pte->value & ~mask) | flags;
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