From 725610ebe9d63b034317cc8b08450c3e51c17ac7 Mon Sep 17 00:00:00 2001 From: Ha Duong Quang Date: Wed, 14 Aug 2024 17:02:53 +0700 Subject: [PATCH] samples/tests: adc: enable samples/tests for s32z270 enable samples/tests adc for s32z270 Signed-off-by: Ha Duong Quang --- .../boards/s32z2xxdc2_s32z270_rtu0.overlay | 95 +++++++++++++++++++ .../boards/s32z2xxdc2_s32z270_rtu1.overlay | 7 ++ .../boards/s32z2xxdc2_s32z270_rtu0.conf | 4 + .../boards/s32z2xxdc2_s32z270_rtu0.overlay | 55 +++++++++++ .../boards/s32z2xxdc2_s32z270_rtu1.conf | 4 + .../boards/s32z2xxdc2_s32z270_rtu1.overlay | 7 ++ .../boards/s32z2xxdc2_s32z270_rtu0.overlay | 36 +++++++ .../boards/s32z2xxdc2_s32z270_rtu1.overlay | 7 ++ 8 files changed, 215 insertions(+) create mode 100644 samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu0.overlay create mode 100644 samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu1.overlay create mode 100644 samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.conf create mode 100644 samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.overlay create mode 100644 samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.conf create mode 100644 samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.overlay create mode 100644 tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu0.overlay create mode 100644 tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu1.overlay diff --git a/samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu0.overlay b/samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu0.overlay new file mode 100644 index 00000000000..c0d37a3ba29 --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu0.overlay @@ -0,0 +1,95 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + zephyr,user { + io-channels = <&sar_adc0 2>, <&sar_adc0 3>, <&sar_adc0 4>, <&sar_adc0 5>, + <&sar_adc1 3>, <&sar_adc1 4>, <&sar_adc1 5>, <&sar_adc1 6>; + }; +}; + +&sar_adc0 { + group-channel = "precision"; + callback-select = "normal-end-chain"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + vref-mv = <1800>; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@4 { + reg = <4>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@5 { + reg = <5>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + +}; + +&sar_adc1 { + group-channel = "standard"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@4 { + reg = <4>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@5 { + reg = <5>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@6 { + reg = <6>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu1.overlay b/samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu1.overlay new file mode 100644 index 00000000000..5b848e0c5af --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/s32z2xxdc2_s32z270_rtu1.overlay @@ -0,0 +1,7 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "s32z2xxdc2_s32z270_rtu0.overlay" diff --git a/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.conf b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.conf new file mode 100644 index 00000000000..7db6cee82cd --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.conf @@ -0,0 +1,4 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SEQUENCE_RESOLUTION=12 diff --git a/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.overlay b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.overlay new file mode 100644 index 00000000000..943e410693a --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu0.overlay @@ -0,0 +1,55 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + aliases { + adc0 = &sar_adc0; + }; + zephyr,user { + io-channels = <&sar_adc0 3>, <&sar_adc0 4>, <&sar_adc0 5>, <&sar_adc0 6>; + }; +}; + +&sar_adc0 { + group-channel = "standard"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@4 { + reg = <4>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@5 { + reg = <5>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@6 { + reg = <6>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.conf b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.conf new file mode 100644 index 00000000000..7db6cee82cd --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.conf @@ -0,0 +1,4 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SEQUENCE_RESOLUTION=12 diff --git a/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.overlay b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.overlay new file mode 100644 index 00000000000..5b848e0c5af --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/s32z2xxdc2_s32z270_rtu1.overlay @@ -0,0 +1,7 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "s32z2xxdc2_s32z270_rtu0.overlay" diff --git a/tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu0.overlay b/tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu0.overlay new file mode 100644 index 00000000000..694cda695d8 --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu0.overlay @@ -0,0 +1,36 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + zephyr,user { + io-channels = <&sar_adc0 2>, <&sar_adc0 3>; + }; +}; + +&sar_adc0 { + group-channel = "precision"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu1.overlay b/tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu1.overlay new file mode 100644 index 00000000000..5b848e0c5af --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/s32z2xxdc2_s32z270_rtu1.overlay @@ -0,0 +1,7 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "s32z2xxdc2_s32z270_rtu0.overlay"