soc: riscv: renove_virt: reorganize SoC folder
Move out from riscv-privileged, and convert to a standalone SoC. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
parent
8729a782f9
commit
724a967c1a
6 changed files with 6 additions and 19 deletions
|
@ -1,7 +1,6 @@
|
||||||
# Copyright (c) 2023 Meta
|
# Copyright (c) 2023 Meta
|
||||||
# SPDX-License-Identifier: Apache-2.0
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
CONFIG_SOC_SERIES_RISCV32_VIRTUAL_RENODE=y
|
|
||||||
CONFIG_SOC_RISCV32_VIRTUAL_RENODE=y
|
CONFIG_SOC_RISCV32_VIRTUAL_RENODE=y
|
||||||
CONFIG_BOARD_RISCV32_VIRTUAL=y
|
CONFIG_BOARD_RISCV32_VIRTUAL=y
|
||||||
CONFIG_CONSOLE=y
|
CONFIG_CONSOLE=y
|
||||||
|
|
|
@ -1,9 +1,9 @@
|
||||||
# Copyright (c) 2023 Meta
|
# Copyright (c) 2023 Meta
|
||||||
# SPDX-License-Identifier: Apache-2.0
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
if SOC_SERIES_RISCV32_VIRTUAL_RENODE
|
if SOC_RISCV32_VIRTUAL_RENODE
|
||||||
|
|
||||||
config SOC_SERIES
|
config SOC
|
||||||
default "renode_virt"
|
default "renode_virt"
|
||||||
|
|
||||||
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
||||||
|
@ -45,4 +45,4 @@ config MAX_IRQ_PER_AGGREGATOR
|
||||||
config NUM_IRQS
|
config NUM_IRQS
|
||||||
default 2058
|
default 2058
|
||||||
|
|
||||||
endif # SOC_SERIES_RISCV32_VIRTUAL_RENODE
|
endif # SOC_RISCV32_VIRTUAL_RENODE
|
|
@ -1,12 +1,11 @@
|
||||||
# Copyright (c) 2023 Meta
|
# Copyright (c) 2023 Meta
|
||||||
# SPDX-License-Identifier: Apache-2.0
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
choice
|
|
||||||
prompt "Renode RISCV32 Virtual system implementation"
|
|
||||||
depends on SOC_SERIES_RISCV32_VIRTUAL_RENODE
|
|
||||||
|
|
||||||
config SOC_RISCV32_VIRTUAL_RENODE
|
config SOC_RISCV32_VIRTUAL_RENODE
|
||||||
bool "Renode RISCV32 Virtual system implementation"
|
bool "Renode RISCV32 Virtual system implementation"
|
||||||
|
select RISCV
|
||||||
|
select RISCV_PRIVILEGED
|
||||||
|
select RISCV_PRIVILEGED_STANDALONE
|
||||||
select ATOMIC_OPERATIONS_BUILTIN
|
select ATOMIC_OPERATIONS_BUILTIN
|
||||||
select INCLUDE_RESET_VECTOR
|
select INCLUDE_RESET_VECTOR
|
||||||
select RISCV_ISA_RV32I
|
select RISCV_ISA_RV32I
|
||||||
|
@ -15,5 +14,3 @@ config SOC_RISCV32_VIRTUAL_RENODE
|
||||||
select RISCV_ISA_EXT_C
|
select RISCV_ISA_EXT_C
|
||||||
select RISCV_ISA_EXT_ZICSR
|
select RISCV_ISA_EXT_ZICSR
|
||||||
select RISCV_ISA_EXT_ZIFENCEI
|
select RISCV_ISA_EXT_ZIFENCEI
|
||||||
|
|
||||||
endchoice
|
|
|
@ -1,9 +0,0 @@
|
||||||
# Copyright (c) 2023 Meta
|
|
||||||
# SPDX-License-Identifier: Apache-2.0
|
|
||||||
|
|
||||||
config SOC_SERIES_RISCV32_VIRTUAL_RENODE
|
|
||||||
bool "Renode RISC-V32 Virtual SoC implementation"
|
|
||||||
select RISCV
|
|
||||||
select SOC_FAMILY_RISCV_PRIVILEGED
|
|
||||||
help
|
|
||||||
Enable support for Renode RISC-V Virtual
|
|
Loading…
Add table
Add a link
Reference in a new issue