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arch: arc: fix the bug of irq_offload

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* remove irq lock/unlock which is not needed because of
  the protection of offload_sem in irq_offload
* simplify the assembly codes related irq_offload, remove
  the thread switch logic
* the old codes may do thread switch in the epilogue of
  irq_offload handling with int locked, this is not correct
  may cause irq_offload related codes crash.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2020-02-07 23:50:20 +08:00 • committed by Johan Hedberg
commit 7249fbf5ad
2 changed files with 0 additions and 80 deletions
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77
arch/arc/core/fault_s.S
View file

@ -277,83 +277,6 @@ exc_nest_handle:
_dec_int_nest_counter r0, r1
lr r0, [_ARC_V2_AUX_IRQ_ACT]
and r0, r0, 0xffff
cmp r0, 0
bne _exc_return_from_exc
#ifdef CONFIG_PREEMPT_ENABLED
#ifdef CONFIG_SMP
bl z_arc_smp_switch_in_isr
breq r0, 0, _exc_return_from_irqoffload_trap
mov_s r2, r1
_save_callee_saved_regs
st _CAUSE_RIRQ, [r2, _thread_offset_to_relinquish_cause]
mov_s r2, r0
#else
mov_s r1, _kernel
ld_s r2, [r1, _kernel_offset_to_current]
/* check if the current thread needs to be rescheduled */
ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
breq r0, r2, _exc_return_from_irqoffload_trap
#endif
#ifdef CONFIG_ARC_SECURE_FIRMWARE
/*
* sync up the ERSEC_STAT.ERM and SEC_STAT.IRM.
* use a fake interrupt return to simulate an exception turn.
* ERM and IRM record which mode the cpu should return, 1: secure
* 0: normal
*/
lr r3,[_ARC_V2_ERSEC_STAT]
btst r3, 31
bset.nz r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
bclr.z r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
sflag r3
/* save _ARC_V2_SEC_STAT */
and r3, r3, 0xff
push_s r3
#endif
_save_callee_saved_regs
st _CAUSE_RIRQ, [r2, _thread_offset_to_relinquish_cause]
/* note: Ok to use _CAUSE_RIRQ since everything is saved */
mov_s r2, r0
#ifndef CONFIG_SMP
st_s r2, [r1, _kernel_offset_to_current]
#endif
/* clear AE bit to forget this was an exception */
lr r3, [_ARC_V2_STATUS32]
and r3,r3,(~_ARC_V2_STATUS32_AE)
kflag r3
/* pretend lowest priority interrupt happened to use common handler */
lr r3, [_ARC_V2_AUX_IRQ_ACT]
#ifdef CONFIG_ARC_SECURE_FIRMWARE
or r3, r3, (1 << (ARC_N_IRQ_START_LEVEL - 1))
#else
or r3, r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
#endif
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
push_s r2
mov_s r0, _ARC_V2_AUX_IRQ_ACT
mov_s r1, r3
mov_s r6, ARC_S_CALL_AUX_WRITE
sjli SJLI_CALL_ARC_SECURE
pop_s r2
#else
sr r3, [_ARC_V2_AUX_IRQ_ACT]
#endif
/* Assumption: r2 has current thread */
b _rirq_common_interrupt_swap
#endif
_exc_return_from_irqoffload_trap:
_pop_irq_stack_frame
rtie
#endif /* CONFIG_IRQ_OFFLOAD */

3
arch/arc/core/irq_offload.c
View file

@ -22,9 +22,7 @@ void z_irq_do_offload(void)
void arch_irq_offload(irq_offload_routine_t routine, void *parameter)
{
unsigned int key;
key = irq_lock();
offload_routine = routine;
offload_param = parameter;
@ -32,5 +30,4 @@ void arch_irq_offload(irq_offload_routine_t routine, void *parameter)
:
: [id] "i"(_TRAP_S_SCALL_IRQ_OFFLOAD) : );
irq_unlock(key);
}