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drivers: cc32xx: Convert drivers to use more new DT_INST macros

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Changing more of DT_* prefixed macros that refer to instances to use
DT_INST macros in GPIO, I2C and UART drivers.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This commit is contained in:
Vincent Wan 2020-04-22 17:53:46 -07:00 • committed by Kumar Gala
commit 720ed0b15e
3 changed files with 39 additions and 41 deletions
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46
drivers/gpio/gpio_cc32xx.c
View file

@ -48,8 +48,6 @@ struct gpio_cc32xx_config {
struct gpio_driver_config common;
/* base address of GPIO port */
unsigned long port_base;
/* GPIO IRQ number */
unsigned long irq_num;
/* GPIO port number */
u8_t port_num;
};
@ -281,8 +279,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a0_config = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(0),
},
.port_base = DT_GPIO_CC32XX_A0_BASE_ADDRESS,
.irq_num = DT_GPIO_CC32XX_A0_IRQ+16,
.port_base = DT_INST_REG_ADDR(0),
.port_num = 0
};
@ -293,16 +290,16 @@ static int gpio_cc32xx_a0_init(struct device *dev)
{
ARG_UNUSED(dev);
IRQ_CONNECT(DT_GPIO_CC32XX_A0_IRQ, DT_GPIO_CC32XX_A0_IRQ_PRI,
IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a0), 0);
MAP_IntPendClear(DT_GPIO_CC32XX_A0_IRQ+16);
irq_enable(DT_GPIO_CC32XX_A0_IRQ);
MAP_IntPendClear(DT_INST_IRQN(0) + 16);
irq_enable(DT_INST_IRQN(0));
return 0;
}
DEVICE_AND_API_INIT(gpio_cc32xx_a0, DT_GPIO_CC32XX_A0_NAME,
DEVICE_AND_API_INIT(gpio_cc32xx_a0, DT_INST_LABEL(0),
&gpio_cc32xx_a0_init, &gpio_cc32xx_a0_data,
&gpio_cc32xx_a0_config,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -315,8 +312,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a1_config = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(1),
},
.port_base = DT_GPIO_CC32XX_A1_BASE_ADDRESS,
.irq_num = DT_GPIO_CC32XX_A1_IRQ+16,
.port_base = DT_INST_REG_ADDR(1),
.port_num = 1
};
@ -327,16 +323,16 @@ static int gpio_cc32xx_a1_init(struct device *dev)
{
ARG_UNUSED(dev);
IRQ_CONNECT(DT_GPIO_CC32XX_A1_IRQ, DT_GPIO_CC32XX_A1_IRQ_PRI,
IRQ_CONNECT(DT_INST_IRQN(1), DT_INST_IRQ(1, priority),
gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a1), 0);
MAP_IntPendClear(DT_GPIO_CC32XX_A1_IRQ+16);
irq_enable(DT_GPIO_CC32XX_A1_IRQ);
MAP_IntPendClear(DT_INST_IRQN(1) + 16);
irq_enable(DT_INST_IRQN(1));
return 0;
}
DEVICE_AND_API_INIT(gpio_cc32xx_a1, DT_GPIO_CC32XX_A1_NAME,
DEVICE_AND_API_INIT(gpio_cc32xx_a1, DT_INST_LABEL(1),
&gpio_cc32xx_a1_init, &gpio_cc32xx_a1_data,
&gpio_cc32xx_a1_config,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -349,8 +345,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a2_config = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(2),
},
.port_base = DT_GPIO_CC32XX_A2_BASE_ADDRESS,
.irq_num = DT_GPIO_CC32XX_A2_IRQ+16,
.port_base = DT_INST_REG_ADDR(2),
.port_num = 2
};
@ -361,16 +356,16 @@ static int gpio_cc32xx_a2_init(struct device *dev)
{
ARG_UNUSED(dev);
IRQ_CONNECT(DT_GPIO_CC32XX_A2_IRQ, DT_GPIO_CC32XX_A2_IRQ_PRI,
IRQ_CONNECT(DT_INST_IRQN(2), DT_INST_IRQ(2, priority),
gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a2), 0);
MAP_IntPendClear(DT_GPIO_CC32XX_A2_IRQ+16);
irq_enable(DT_GPIO_CC32XX_A2_IRQ);
MAP_IntPendClear(DT_INST_IRQN(2) + 16);
irq_enable(DT_INST_IRQN(2));
return 0;
}
DEVICE_AND_API_INIT(gpio_cc32xx_a2, DT_GPIO_CC32XX_A2_NAME,
DEVICE_AND_API_INIT(gpio_cc32xx_a2, DT_INST_LABEL(2),
&gpio_cc32xx_a2_init, &gpio_cc32xx_a2_data,
&gpio_cc32xx_a2_config,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
@ -383,8 +378,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a3_config = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(3),
},
.port_base = DT_GPIO_CC32XX_A3_BASE_ADDRESS,
.irq_num = DT_GPIO_CC32XX_A3_IRQ+16,
.port_base = DT_INST_REG_ADDR(3),
.port_num = 3
};
@ -395,16 +389,16 @@ static int gpio_cc32xx_a3_init(struct device *dev)
{
ARG_UNUSED(dev);
IRQ_CONNECT(DT_GPIO_CC32XX_A3_IRQ, DT_GPIO_CC32XX_A3_IRQ_PRI,
IRQ_CONNECT(DT_INST_IRQN(3), DT_INST_IRQ(3, priority),
gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a3), 0);
MAP_IntPendClear(DT_GPIO_CC32XX_A3_IRQ+16);
irq_enable(DT_GPIO_CC32XX_A3_IRQ);
MAP_IntPendClear(DT_INST_IRQN(3) + 16);
irq_enable(DT_INST_IRQN(3));
return 0;
}
DEVICE_AND_API_INIT(gpio_cc32xx_a3, DT_GPIO_CC32XX_A3_NAME,
DEVICE_AND_API_INIT(gpio_cc32xx_a3, DT_INST_LABEL(3),
&gpio_cc32xx_a3_init, &gpio_cc32xx_a3_data,
&gpio_cc32xx_a3_config,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,

18
drivers/i2c/i2c_cc32xx.c
View file

@ -6,6 +6,8 @@
/* The logic here is adapted from SimpleLink SDK's I2CCC32XX.c module. */
#define DT_DRV_COMPAT ti_cc32xx_i2c
#include <kernel.h>
#include <errno.h>
#include <drivers/i2c.h>
@ -79,6 +81,7 @@ struct i2c_cc32xx_data {
static void configure_i2c_irq(const struct i2c_cc32xx_config *config);
#define I2C_CLK_FREQ(n) DT_PROP(DT_INST_PHANDLE(n, clocks), clock_frequency)
static int i2c_cc32xx_configure(struct device *dev, u32_t dev_config_raw)
{
u32_t base = DEV_BASE(dev);
@ -103,8 +106,7 @@ static int i2c_cc32xx_configure(struct device *dev, u32_t dev_config_raw)
return -EINVAL;
}
MAP_I2CMasterInitExpClk(base, DT_I2C_0_CLOCK_FREQUENCY,
bitrate_id);
MAP_I2CMasterInitExpClk(base, I2C_CLK_FREQ(0), bitrate_id);
return 0;
}
@ -372,22 +374,22 @@ static const struct i2c_driver_api i2c_cc32xx_driver_api = {
static const struct i2c_cc32xx_config i2c_cc32xx_config = {
.base = DT_I2C_0_BASE_ADDRESS,
.bitrate = DT_I2C_0_BITRATE,
.irq_no = DT_I2C_0_IRQ,
.base = DT_INST_REG_ADDR(0),
.bitrate = DT_INST_PROP(0, clock_frequency),
.irq_no = DT_INST_IRQN(0),
};
static struct i2c_cc32xx_data i2c_cc32xx_data;
DEVICE_AND_API_INIT(i2c_cc32xx, DT_I2C_0_LABEL, &i2c_cc32xx_init,
DEVICE_AND_API_INIT(i2c_cc32xx, DT_INST_LABEL(0), &i2c_cc32xx_init,
&i2c_cc32xx_data, &i2c_cc32xx_config,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&i2c_cc32xx_driver_api);
static void configure_i2c_irq(const struct i2c_cc32xx_config *config)
{
IRQ_CONNECT(DT_I2C_0_IRQ,
DT_I2C_0_IRQ_PRIORITY,
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority),
i2c_cc32xx_isr, DEVICE_GET(i2c_cc32xx), 0);
irq_enable(config->irq_no);

16
drivers/serial/uart_cc32xx.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc32xx_uart
#include <kernel.h>
#include <arch/cpu.h>
#include <drivers/uart.h>
@ -37,8 +39,8 @@ static void uart_cc32xx_isr(void *arg);
#endif
static const struct uart_device_config uart_cc32xx_dev_cfg_0 = {
.base = (void *)DT_TI_CC32XX_UART_4000C000_BASE_ADDRESS,
.sys_clk_freq = DT_TI_CC32XX_UART_4000C000_CLOCKS_CLOCK_FREQUENCY,
.base = (void *)DT_INST_REG_ADDR(0),
.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency)
};
static struct uart_cc32xx_dev_data_t uart_cc32xx_dev_data_0 = {
@ -63,7 +65,7 @@ static int uart_cc32xx_init(struct device *dev)
/* This also calls MAP_UARTEnable() to enable the FIFOs: */
MAP_UARTConfigSetExpClk((unsigned long)config->base,
MAP_PRCMPeripheralClockGet(PRCM_UARTA0),
DT_TI_CC32XX_UART_4000C000_CURRENT_SPEED,
DT_INST_PROP(0, current_speed),
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE
| UART_CONFIG_PAR_NONE));
MAP_UARTFlowControlSet((unsigned long)config->base,
@ -75,11 +77,11 @@ static int uart_cc32xx_init(struct device *dev)
/* Clear any pending UART RX interrupts: */
MAP_UARTIntClear((unsigned long)config->base, UART_INT_RX);
IRQ_CONNECT(DT_TI_CC32XX_UART_4000C000_IRQ_0,
DT_TI_CC32XX_UART_4000C000_IRQ_0_PRIORITY,
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority),
uart_cc32xx_isr, DEVICE_GET(uart_cc32xx_0),
0);
irq_enable(DT_TI_CC32XX_UART_4000C000_IRQ_0);
irq_enable(DT_INST_IRQN(0));
/* Fill the tx fifo, so Zephyr console & shell subsystems get "primed"
* with first tx fifo empty interrupt when they first call
@ -314,7 +316,7 @@ static const struct uart_driver_api uart_cc32xx_driver_api = {
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
DEVICE_AND_API_INIT(uart_cc32xx_0, DT_UART_CC32XX_NAME,
DEVICE_AND_API_INIT(uart_cc32xx_0, DT_INST_LABEL(0),
uart_cc32xx_init, &uart_cc32xx_dev_data_0,
&uart_cc32xx_dev_cfg_0,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,