drivers: cc32xx: Convert drivers to use more new DT_INST macros
Changing more of DT_* prefixed macros that refer to instances to use DT_INST macros in GPIO, I2C and UART drivers. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This commit is contained in:
parent
9b4298c20d
commit
720ed0b15e
3 changed files with 39 additions and 41 deletions
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@ -48,8 +48,6 @@ struct gpio_cc32xx_config {
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struct gpio_driver_config common;
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/* base address of GPIO port */
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unsigned long port_base;
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/* GPIO IRQ number */
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unsigned long irq_num;
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/* GPIO port number */
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u8_t port_num;
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};
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@ -281,8 +279,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a0_config = {
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.common = {
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(0),
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},
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.port_base = DT_GPIO_CC32XX_A0_BASE_ADDRESS,
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.irq_num = DT_GPIO_CC32XX_A0_IRQ+16,
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.port_base = DT_INST_REG_ADDR(0),
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.port_num = 0
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};
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@ -293,16 +290,16 @@ static int gpio_cc32xx_a0_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_GPIO_CC32XX_A0_IRQ, DT_GPIO_CC32XX_A0_IRQ_PRI,
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IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
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gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a0), 0);
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MAP_IntPendClear(DT_GPIO_CC32XX_A0_IRQ+16);
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irq_enable(DT_GPIO_CC32XX_A0_IRQ);
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MAP_IntPendClear(DT_INST_IRQN(0) + 16);
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irq_enable(DT_INST_IRQN(0));
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return 0;
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}
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DEVICE_AND_API_INIT(gpio_cc32xx_a0, DT_GPIO_CC32XX_A0_NAME,
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DEVICE_AND_API_INIT(gpio_cc32xx_a0, DT_INST_LABEL(0),
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&gpio_cc32xx_a0_init, &gpio_cc32xx_a0_data,
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&gpio_cc32xx_a0_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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@ -315,8 +312,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a1_config = {
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.common = {
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(1),
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},
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.port_base = DT_GPIO_CC32XX_A1_BASE_ADDRESS,
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.irq_num = DT_GPIO_CC32XX_A1_IRQ+16,
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.port_base = DT_INST_REG_ADDR(1),
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.port_num = 1
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};
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@ -327,16 +323,16 @@ static int gpio_cc32xx_a1_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_GPIO_CC32XX_A1_IRQ, DT_GPIO_CC32XX_A1_IRQ_PRI,
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IRQ_CONNECT(DT_INST_IRQN(1), DT_INST_IRQ(1, priority),
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gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a1), 0);
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MAP_IntPendClear(DT_GPIO_CC32XX_A1_IRQ+16);
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irq_enable(DT_GPIO_CC32XX_A1_IRQ);
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MAP_IntPendClear(DT_INST_IRQN(1) + 16);
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irq_enable(DT_INST_IRQN(1));
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return 0;
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}
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DEVICE_AND_API_INIT(gpio_cc32xx_a1, DT_GPIO_CC32XX_A1_NAME,
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DEVICE_AND_API_INIT(gpio_cc32xx_a1, DT_INST_LABEL(1),
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&gpio_cc32xx_a1_init, &gpio_cc32xx_a1_data,
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&gpio_cc32xx_a1_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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@ -349,8 +345,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a2_config = {
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.common = {
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(2),
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},
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.port_base = DT_GPIO_CC32XX_A2_BASE_ADDRESS,
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.irq_num = DT_GPIO_CC32XX_A2_IRQ+16,
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.port_base = DT_INST_REG_ADDR(2),
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.port_num = 2
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};
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@ -361,16 +356,16 @@ static int gpio_cc32xx_a2_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_GPIO_CC32XX_A2_IRQ, DT_GPIO_CC32XX_A2_IRQ_PRI,
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IRQ_CONNECT(DT_INST_IRQN(2), DT_INST_IRQ(2, priority),
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gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a2), 0);
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MAP_IntPendClear(DT_GPIO_CC32XX_A2_IRQ+16);
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irq_enable(DT_GPIO_CC32XX_A2_IRQ);
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MAP_IntPendClear(DT_INST_IRQN(2) + 16);
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irq_enable(DT_INST_IRQN(2));
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return 0;
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}
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DEVICE_AND_API_INIT(gpio_cc32xx_a2, DT_GPIO_CC32XX_A2_NAME,
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DEVICE_AND_API_INIT(gpio_cc32xx_a2, DT_INST_LABEL(2),
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&gpio_cc32xx_a2_init, &gpio_cc32xx_a2_data,
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&gpio_cc32xx_a2_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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@ -383,8 +378,7 @@ static const struct gpio_cc32xx_config gpio_cc32xx_a3_config = {
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.common = {
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(3),
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},
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.port_base = DT_GPIO_CC32XX_A3_BASE_ADDRESS,
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.irq_num = DT_GPIO_CC32XX_A3_IRQ+16,
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.port_base = DT_INST_REG_ADDR(3),
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.port_num = 3
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};
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@ -395,16 +389,16 @@ static int gpio_cc32xx_a3_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_GPIO_CC32XX_A3_IRQ, DT_GPIO_CC32XX_A3_IRQ_PRI,
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IRQ_CONNECT(DT_INST_IRQN(3), DT_INST_IRQ(3, priority),
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gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a3), 0);
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MAP_IntPendClear(DT_GPIO_CC32XX_A3_IRQ+16);
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irq_enable(DT_GPIO_CC32XX_A3_IRQ);
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MAP_IntPendClear(DT_INST_IRQN(3) + 16);
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irq_enable(DT_INST_IRQN(3));
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return 0;
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}
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DEVICE_AND_API_INIT(gpio_cc32xx_a3, DT_GPIO_CC32XX_A3_NAME,
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DEVICE_AND_API_INIT(gpio_cc32xx_a3, DT_INST_LABEL(3),
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&gpio_cc32xx_a3_init, &gpio_cc32xx_a3_data,
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&gpio_cc32xx_a3_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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@ -6,6 +6,8 @@
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/* The logic here is adapted from SimpleLink SDK's I2CCC32XX.c module. */
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#define DT_DRV_COMPAT ti_cc32xx_i2c
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#include <kernel.h>
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#include <errno.h>
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#include <drivers/i2c.h>
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@ -79,6 +81,7 @@ struct i2c_cc32xx_data {
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static void configure_i2c_irq(const struct i2c_cc32xx_config *config);
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#define I2C_CLK_FREQ(n) DT_PROP(DT_INST_PHANDLE(n, clocks), clock_frequency)
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static int i2c_cc32xx_configure(struct device *dev, u32_t dev_config_raw)
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{
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u32_t base = DEV_BASE(dev);
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@ -103,8 +106,7 @@ static int i2c_cc32xx_configure(struct device *dev, u32_t dev_config_raw)
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return -EINVAL;
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}
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MAP_I2CMasterInitExpClk(base, DT_I2C_0_CLOCK_FREQUENCY,
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bitrate_id);
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MAP_I2CMasterInitExpClk(base, I2C_CLK_FREQ(0), bitrate_id);
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return 0;
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}
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@ -372,22 +374,22 @@ static const struct i2c_driver_api i2c_cc32xx_driver_api = {
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static const struct i2c_cc32xx_config i2c_cc32xx_config = {
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.base = DT_I2C_0_BASE_ADDRESS,
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.bitrate = DT_I2C_0_BITRATE,
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.irq_no = DT_I2C_0_IRQ,
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.base = DT_INST_REG_ADDR(0),
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.bitrate = DT_INST_PROP(0, clock_frequency),
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.irq_no = DT_INST_IRQN(0),
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};
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static struct i2c_cc32xx_data i2c_cc32xx_data;
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DEVICE_AND_API_INIT(i2c_cc32xx, DT_I2C_0_LABEL, &i2c_cc32xx_init,
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DEVICE_AND_API_INIT(i2c_cc32xx, DT_INST_LABEL(0), &i2c_cc32xx_init,
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&i2c_cc32xx_data, &i2c_cc32xx_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&i2c_cc32xx_driver_api);
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static void configure_i2c_irq(const struct i2c_cc32xx_config *config)
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{
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IRQ_CONNECT(DT_I2C_0_IRQ,
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DT_I2C_0_IRQ_PRIORITY,
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority),
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i2c_cc32xx_isr, DEVICE_GET(i2c_cc32xx), 0);
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irq_enable(config->irq_no);
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@ -4,6 +4,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_cc32xx_uart
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <drivers/uart.h>
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@ -37,8 +39,8 @@ static void uart_cc32xx_isr(void *arg);
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#endif
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static const struct uart_device_config uart_cc32xx_dev_cfg_0 = {
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.base = (void *)DT_TI_CC32XX_UART_4000C000_BASE_ADDRESS,
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.sys_clk_freq = DT_TI_CC32XX_UART_4000C000_CLOCKS_CLOCK_FREQUENCY,
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.base = (void *)DT_INST_REG_ADDR(0),
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency)
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};
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static struct uart_cc32xx_dev_data_t uart_cc32xx_dev_data_0 = {
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@ -63,7 +65,7 @@ static int uart_cc32xx_init(struct device *dev)
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/* This also calls MAP_UARTEnable() to enable the FIFOs: */
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MAP_UARTConfigSetExpClk((unsigned long)config->base,
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MAP_PRCMPeripheralClockGet(PRCM_UARTA0),
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DT_TI_CC32XX_UART_4000C000_CURRENT_SPEED,
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DT_INST_PROP(0, current_speed),
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(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE
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| UART_CONFIG_PAR_NONE));
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MAP_UARTFlowControlSet((unsigned long)config->base,
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@ -75,11 +77,11 @@ static int uart_cc32xx_init(struct device *dev)
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/* Clear any pending UART RX interrupts: */
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MAP_UARTIntClear((unsigned long)config->base, UART_INT_RX);
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IRQ_CONNECT(DT_TI_CC32XX_UART_4000C000_IRQ_0,
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DT_TI_CC32XX_UART_4000C000_IRQ_0_PRIORITY,
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority),
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uart_cc32xx_isr, DEVICE_GET(uart_cc32xx_0),
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0);
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irq_enable(DT_TI_CC32XX_UART_4000C000_IRQ_0);
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irq_enable(DT_INST_IRQN(0));
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/* Fill the tx fifo, so Zephyr console & shell subsystems get "primed"
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* with first tx fifo empty interrupt when they first call
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@ -314,7 +316,7 @@ static const struct uart_driver_api uart_cc32xx_driver_api = {
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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DEVICE_AND_API_INIT(uart_cc32xx_0, DT_UART_CC32XX_NAME,
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DEVICE_AND_API_INIT(uart_cc32xx_0, DT_INST_LABEL(0),
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uart_cc32xx_init, &uart_cc32xx_dev_data_0,
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&uart_cc32xx_dev_cfg_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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