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soc: nxp: mcxw: Switch to soc_reset_hook

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Base enablement of MCXW merged while z_arm_platform_init was being
deprecated, resulting situation is now that no platform init is
happening, fix by converting to use soc_reset_hook.

Also fix a comment that said the core was being set to 40 MHz, when it
is actually being set up to 96 MHz.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-09-24 12:03:45 -05:00 • committed by Henrik Brix Andersen
commit 7152dc19e1
3 changed files with 7 additions and 14 deletions
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3
soc/nxp/mcx/mcxw/Kconfig
View file

@ -12,5 +12,6 @@ config SOC_SERIES_MCXW
select CPU_HAS_ARM_MPU select CPU_HAS_ARM_MPU
select ARMV8_M_DSP select ARMV8_M_DSP
select HAS_MCUX select HAS_MCUX
select PLATFORM_SPECIFIC_INIT select SOC_RESET_HOOK
select SOC_EARLY_INIT_HOOK
select CLOCK_CONTROL select CLOCK_CONTROL

10
soc/nxp/mcx/mcxw/mcxw71_platform_init.S
View file

@ -16,13 +16,11 @@
#include <zephyr/linker/sections.h> #include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE _ASM_FILE_PROLOGUE
#ifdef CONFIG_PLATFORM_SPECIFIC_INIT
GTEXT(soc_reset_hook)
SECTION_SUBSEC_FUNC(TEXT,_reset_section,soc_reset_hook)
GTEXT(z_arm_platform_init) .soc_reset_hook:
SECTION_SUBSEC_FUNC(TEXT,_reset_section,z_arm_platform_init)
.z_arm_platform_init:
ldr r0, =0x14000000 ldr r0, =0x14000000
ldr r1, =.ram_init_ctcm01 ldr r1, =.ram_init_ctcm01
bics r1, #0x10000000 bics r1, #0x10000000
@ -55,5 +53,3 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,z_arm_platform_init)
bcc .loop5 bcc .loop5
.ram_init_done: .ram_init_done:
b SystemInit b SystemInit
#endif /* CONFIG_PLATFORM_SPECIFIC_INIT */

8
soc/nxp/mcx/mcxw/soc.c
View file

@ -144,14 +144,14 @@ static void vbat_init(void)
base->STATUSA |= VBAT_STATUSA_POR_DET_MASK; base->STATUSA |= VBAT_STATUSA_POR_DET_MASK;
}; };
static int nxp_mcxw71_init(void) void soc_early_init_hook(void)
{ {
unsigned int oldLevel; /* old interrupt lock level */ unsigned int oldLevel; /* old interrupt lock level */
/* disable interrupts */ /* disable interrupts */
oldLevel = irq_lock(); oldLevel = irq_lock();
/* Initialize system clock to 40 MHz */ /* Initialize system clock to 96 MHz */
clock_init(); clock_init();
/* Smart power switch initialization */ /* Smart power switch initialization */
@ -159,8 +159,4 @@ static int nxp_mcxw71_init(void)
/* restore interrupt state */ /* restore interrupt state */
irq_unlock(oldLevel); irq_unlock(oldLevel);
return 0;
} }
SYS_INIT(nxp_mcxw71_init, PRE_KERNEL_1, 0);