board: ti_am62x_sk_m4: Added board files for TI AM62X SK

Added configuration and documentation files for the AM62x board
M4 core.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>

boards/arm/ti_am62x_sk_m4/Kconfig.board

@@ -0,0 +1,10 @@
+# Texas Instruments Sitara AM62x-SK-M4 EVM
+#
+# Copyright (c) 2023 Texas Instruments Incorporated
+# Copyright (c) 2023 L Lakshmanan
+#
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_TI_AM62X_SK_M4
+	bool "TI_AM62X_SK_M4"
+	depends on SOC_SERIES_AM62X_M4

boards/arm/ti_am62x_sk_m4/Kconfig.defconfig

@@ -0,0 +1,13 @@
+# Texas Instruments Sitara AM62x-SK-M4 EVM
+#
+# Copyright (c) 2023 Texas Instruments Incorporated
+# Copyright (c) 2023 L Lakshmanan
+#
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_TI_AM62X_SK_M4
+
+config BOARD
+	default "ti_am62x_sk_m4"
+
+endif # BOARD_TI_AM62X_SK_M4

boards/arm/ti_am62x_sk_m4/doc/index.rst

@@ -0,0 +1,141 @@
+.. _ti_am62x_sk_m4:
+
+AM62x-SK M4F Core
+#################
+
+Overview
+********
+
+The AM62x-SK board configuration is used by Zephyr applications that run on
+the TI AM62x platform. The board configuration provides support for the ARM
+Cortex-M4F MCU core and the following features:
+
+- Nested Vector Interrupt Controller (NVIC)
+- System Tick System Clock (SYSTICK)
+
+The board configuration also enables support for the semihosting debugging console.
+
+See the `TI AM62X Product Page`_ for details.
+
+.. figure:: img/sk_am62_angled.webp
+   :align: center
+   :alt: TI AM62x-SK EVM
+
+   Texas Instruments AM62x SK EVM
+
+Hardware
+********
+The AM62x-SK EVM features the AM62x SoC, which is composed of a quad Cortex-A53
+cluster and a single Cortex-M4 core in the MCU domain. Zephyr is ported to run on
+the M4F core and the following listed hardware specifications are used:
+
+- Low-power ARM Cortex-M4F
+- Memory
+
+   - 256KB of SRAM
+   - 2GB of DDR4
+
+- Debug
+
+   - XDS110 based JTAG
+
+Supported Features
+==================
+
+The ti_am62x_sk_m4 configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| PINCTRL   | on-chip    | pinctrl                             |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial                              |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not currently supported by the port.
+
+Devices
+========
+System Clock
+------------
+
+This board configuration uses a system clock frequency of 400 MHz.
+
+DDR RAM
+-------
+
+The board has 2GB of DDR RAM available. This board configuration
+allocates Zephyr 4kB of RAM (only for resource table: 0x9CC00000 to 0x9CC00400).
+
+Serial Port
+-----------
+
+This board configuration uses a single serial communication channel with the
+MCU domain UART (MCU_UART0).
+
+SD Card
+*******
+
+Download TI's official `WIC`_ and flash the WIC file with an etching software
+onto an SD-card. This will boot Linux on the A53 application cores of the EVM.
+These cores will then load the zephyr binary on the M4 core using remoteproc.
+
+The default configuration can be found in the defconfig file:
+
+.. code-block:: console
+
+   boards/arm/ti_am62x_sk_m4/ti_am62x_sk_m4_defconfig
+
+Flashing
+********
+
+The board can using remoteproc, and uses the OpenAMP resource table to accomplish this.
+
+The testing requires the binary to be copied to the SD card to allow the A53 cores to load it while booting using remoteproc.
+
+To test the M4F core, we build the `hello_world` sample with the following command.
+
+.. code-block:: console
+
+   # From the root of the Zephyr repository
+   west build -p -b ti_am62x_sk_m4 samples/hello_world
+
+This builds the program and the binary is present in the `build/zephyr` directory as `zephyr.elf`.
+
+We now copy this binary onto the SD card in the `/lib/firmware` directory and name it as `am62-mcu-m4f0_0-fw`.
+
+.. code-block:: console
+
+   # Mount the SD card at sdcard for example
+   sudo mount /dev/sdX sdcard
+   # copy the elf to the /lib/firmware directory
+   sudo cp zephyr.elf sdcard/lib/firmware/am62-mcu-m4f0_0-fw
+
+The SD card can now be used for booting. The binary will now be loaded onto the M4F core on boot.
+
+To allow the board to boot using the SD card, set the boot pins to the SD Card boot mode. Refer to `EVM Setup Page`_.
+
+After changing the boot mode, the board should go through the boot sequence on powering up.
+The binary will run and print Hello world to the MCU_UART0 port.
+
+References
+**********
+
+AM62x SK EVM TRM:
+   https://www.ti.com/lit/ug/spruiv7/spruiv7.pdf
+
+.. _TI AM62X Product Page:
+   https://www.ti.com/product/AM625
+
+.. _WIC:
+   https://dr-download.ti.com/software-development/software-development-kit-sdk/MD-PvdSyIiioq/08.06.00.42/tisdk-default-image-am62xx-evm.wic.xz
+
+.. _AM62x SK EVM TRM:
+   https://www.ti.com/lit/ug/spruiv7/spruiv7.pdf
+
+.. _EVM Setup Page:
+   https://software-dl.ti.com/mcu-plus-sdk/esd/AM62X/08_06_00_18/exports/docs/api_guide_am62x/EVM_SETUP_PAGE.html

boards/arm/ti_am62x_sk_m4/ti_am62x_sk_m4.dts

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2023 Texas Instruments Incorporated
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <ti/am62x_sk_m4.dtsi>
+
+/ {
+	model = "TI AM62X SK EVALUATION BOARD";
+	compatible = "ti,ti_am62x_sk_m4";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram1 = &ddr0;
+	};
+
+	cpus {
+		cpu@0 {
+			status = "okay";
+			clock-frequency = <400000000>;
+		};
+	};
+
+	ddr0:memory@9CC00000{
+		compatible = "zephyr,memory-region", "mmio-sram";
+		reg = <0x9CC00000 DT_SIZE_K(4)>;
+		zephyr,memory-region = "DDR";
+	};
+};
+
+&pinctrl {
+	mcu_uart0_rx_default: mcu_uart0_rx_default {
+		pinmux = <K3_PINMUX(0x0014, PIN_INPUT, MUX_MODE_0)>;
+	};
+	mcu_uart0_tx_default: mcu_uart0_tx_default {
+		pinmux = <K3_PINMUX(0x0018, PIN_OUTPUT, MUX_MODE_0)>;
+	};
+};
+
+&uart0 {
+	current-speed = <115200>;
+	pinctrl-0 = <&mcu_uart0_rx_default &mcu_uart0_tx_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/arm/ti_am62x_sk_m4/ti_am62x_sk_m4.yaml

@@ -0,0 +1,7 @@
+identifier: ti_am62x_sk_m4
+name: TI AM62X SK M4
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+ram: 192

boards/arm/ti_am62x_sk_m4/ti_am62x_sk_m4_defconfig

@@ -0,0 +1,25 @@
+# Texas Instruments Sitara AM62x-SK-M4 EVM
+#
+# Copyright (c) 2023 Texas Instruments Incorporated
+# Copyright (c) 2023 L Lakshmanan
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# Platform Configuration
+CONFIG_SOC_SERIES_AM62X_M4=y
+CONFIG_SOC_AM62x_M4=y
+CONFIG_BOARD_TI_AM62X_SK_M4=y
+CONFIG_CORTEX_M_SYSTICK=y
+
+# Zephyr Kernel Configuration
+CONFIG_XIP=n
+
+# Enable Pinctrl
+CONFIG_PINCTRL=y
+
+# Serial Driver
+CONFIG_SERIAL=y
+
+# Enable Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

soc/arm/ti_k3/am62x_m4/soc.c

@@ -11,6 +11,11 @@
 #include <soc.h>
 
 #define ADDR_TRANSLATE_RAT_BASE_ADDR		(0x044200000u)
+#define PINCTRL_BASE_ADDR			(0x4080000u)
+#define KICK0_UNLOCK_VAL			(0x68EF3490U)
+#define KICK1_UNLOCK_VAL			(0xD172BC5AU)
+#define CSL_MCU_PADCONFIG_LOCK0_KICK0_OFFSET	(0x1008)
+#define CSL_MCU_PADCONFIG_LOCK1_KICK0_OFFSET	(0x5008)
 
 static struct address_trans_region_config region_config[] = {
 	{
@@ -39,10 +44,29 @@ static struct address_trans_region_config region_config[] = {
  */
 };
 
+static void mmr_unlock(void)
+{
+	uint32_t baseAddr = PINCTRL_BASE_ADDR;
+	uintptr_t kickAddr;
+
+	/* Lock 0 */
+	kickAddr = baseAddr + CSL_MCU_PADCONFIG_LOCK0_KICK0_OFFSET;
+	sys_write32(KICK0_UNLOCK_VAL, kickAddr);   /* KICK 0 */
+	kickAddr = kickAddr + sizeof(uint32_t *);
+	sys_write32(KICK1_UNLOCK_VAL, kickAddr);   /* KICK 1 */
+
+	/* Lock 1 */
+	kickAddr = baseAddr + CSL_MCU_PADCONFIG_LOCK1_KICK0_OFFSET;
+	sys_write32(KICK0_UNLOCK_VAL, kickAddr);   /* KICK 0 */
+	kickAddr = kickAddr + sizeof(uint32_t *);
+	sys_write32(KICK1_UNLOCK_VAL, kickAddr);   /* KICK 1 */
+}
+
 static int am62x_m4_init(void)
 {
 	sys_mm_drv_ti_rat_init(
 		region_config, ADDR_TRANSLATE_RAT_BASE_ADDR, ARRAY_SIZE(region_config));
+	mmr_unlock();
 	return 0;
 }
 

soc/arm/ti_k3/pinctrl_soc.h

@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2023 Texas Instruments Incorporated
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_ARM_TI_K3_PINCTRL_SOC_H_
+#define ZEPHYR_SOC_ARM_TI_K3_PINCTRL_SOC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct pinctrl_soc_pin {
+	uint32_t offset;
+	uint32_t value;
+};
+
+typedef struct pinctrl_soc_pin pinctrl_soc_pin_t;
+
+#define TI_K3_DT_PIN(node_id)				\
+	{							\
+		.offset = DT_PROP_BY_IDX(node_id, pinmux, 0),	\
+		.value = DT_PROP_BY_IDX(node_id, pinmux, 1)	\
+	},
+
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)		\
+	TI_K3_DT_PIN(DT_PROP_BY_IDX(node_id, prop, idx))
+
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)		\
+	{ DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) }
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ZEPHYR_SOC_ARM_TI_K3_PINCTRL_SOC_H_ */