diff --git a/boards/arm/nrf9160dk_nrf52840/CMakeLists.txt b/boards/arm/nrf9160dk_nrf52840/CMakeLists.txt index a4a41e43b44..218a0602483 100644 --- a/boards/arm/nrf9160dk_nrf52840/CMakeLists.txt +++ b/boards/arm/nrf9160dk_nrf52840/CMakeLists.txt @@ -2,4 +2,3 @@ zephyr_library() zephyr_library_sources(board.c) -zephyr_library_sources(integrity.c) diff --git a/boards/arm/nrf9160dk_nrf52840/Kconfig b/boards/arm/nrf9160dk_nrf52840/Kconfig index 4a6873fefd5..2479d89b763 100644 --- a/boards/arm/nrf9160dk_nrf52840/Kconfig +++ b/boards/arm/nrf9160dk_nrf52840/Kconfig @@ -10,244 +10,6 @@ config BOARD_ENABLE_DCDC select SOC_DCDC_NRF52X default y -choice - prompt "nRF9160 UART0 routing" - default BOARD_NRF9160DK_UART0_VCOM - -config BOARD_NRF9160DK_UART0_VCOM - bool "Route to VCOM0" - -config BOARD_NRF9160DK_UART0_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "nRF9160 UART1 routing" - default BOARD_NRF9160DK_UART1_VCOM - -config BOARD_NRF9160DK_UART1_VCOM - bool "Route to VCOM2" - -config BOARD_NRF9160DK_UART1_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "LED 1 routing" - default BOARD_NRF9160DK_LED0_PHY - -config BOARD_NRF9160DK_LED0_PHY - bool "Route to LED on the kit" - -config BOARD_NRF9160DK_LED0_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "LED 2 routing" - default BOARD_NRF9160DK_LED1_PHY - -config BOARD_NRF9160DK_LED1_PHY - bool "Route to LED on the kit" - -config BOARD_NRF9160DK_LED1_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "LED 3 routing" - default BOARD_NRF9160DK_LED2_PHY - -config BOARD_NRF9160DK_LED2_PHY - bool "Route to LED on the kit" - -config BOARD_NRF9160DK_LED2_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "LED 4 routing" - default BOARD_NRF9160DK_LED3_PHY - -config BOARD_NRF9160DK_LED3_PHY - bool "Route to LED on the kit" - -config BOARD_NRF9160DK_LED3_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "Button 1 routing" - default BOARD_NRF9160DK_BUTTON0_PHY - -config BOARD_NRF9160DK_BUTTON0_PHY - bool "Route to buttons on the kit" - -config BOARD_NRF9160DK_BUTTON0_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "Button 2 routing" - default BOARD_NRF9160DK_BUTTON1_PHY - -config BOARD_NRF9160DK_BUTTON1_PHY - bool "Route to buttons on the kit" - -config BOARD_NRF9160DK_BUTTON1_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "Switch 1 routing" - default BOARD_NRF9160DK_SWITCH0_PHY - -config BOARD_NRF9160DK_SWITCH0_PHY - bool "Route to switches on the kit" - -config BOARD_NRF9160DK_SWITCH0_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "Switch 2 routing" - default BOARD_NRF9160DK_SWITCH1_PHY - -config BOARD_NRF9160DK_SWITCH1_PHY - bool "Route to switches on the kit" - -config BOARD_NRF9160DK_SWITCH1_ARDUINO - bool "Route to Arduino pins" - -endchoice - -choice - prompt "Interface pins 0-2" - default BOARD_NRF9160DK_INTERFACE0_ARDUINO - -config BOARD_NRF9160DK_INTERFACE0_ARDUINO - bool "Route to Arduino pins" - help - Pin 0: nRF9160 P0.17 connects to A3 - Pin 1: nRF9160 P0.18 connects to A4 - Pin 2: nRF9160 P0.19 connects to A5 - -config BOARD_NRF9160DK_INTERFACE0_MCU - bool "Route to nRF52840" - help - This connects the following pins on the nRF9160 to pins on the nRF52840: - Pin 0: nRF9160 P0.17 connects to nRF52840 P0.17 - Pin 1: nRF9160 P0.18 connects to nRF52840 P0.20 - Pin 2: nRF9160 P0.19 connects to nRF52840 P0.15 - -endchoice - -choice - prompt "Interface pins 3-5" - default BOARD_NRF9160DK_INTERFACE1_TRACE - -config BOARD_NRF9160DK_INTERFACE1_TRACE - bool "Route to TRACE interface" - help - Pin 3: nRF9160 P0.21 connects to TRACECLK - Pin 4: nRF9160 P0.22 connects to TRACEDATA0 - Pin 5: nRF9160 P0.23 connects to TRACEDATA1 - -config BOARD_NRF9160DK_INTERFACE1_MCU - bool "Route to nRF52840" - help - Pin 3: nRF9160 P0.21 connects to nRF52840 P0.22 - Pin 4: nRF9160 P0.22 connects to nRF52840 P1.04 - Pin 5: nRF9160 P0.23 connects to nRF52840 P1.02 - -endchoice - -choice - prompt "Interface pins 6-8" - default BOARD_NRF9160DK_INTERFACE2_COEX - -config BOARD_NRF9160DK_INTERFACE2_COEX - bool "Route to COEX interface" - help - Pin 6: nRF9160 COEX0 connects to COEX0_PH - Pin 7: nRF9160 COEX1 connects to COEX1_PH - Pin 8: nRF9160 COEX2 connects to COEX2_PH - -config BOARD_NRF9160DK_INTERFACE2_MCU - bool "Route to nRF52840" - help - Pin 6: nRF9160 COEX0 connects to nRF52840 P1.13 - Pin 7: nRF9160 COEX1 connects to nRF52840 P1.11 - Pin 8: nRF9160 COEX2 connects to nRF52840 P1.15 - -endchoice - -config BOARD_NRF9160DK_NRF52840_RESET - bool "Enable GPIO reset line" - help - Let the nRF52840 be reset from the nRF9160 via a GPIO line. - The GPIO line may only be one of the first 6 MCU interface pins. - The line is active high. - -choice - prompt "Pin used for reset" - depends on BOARD_NRF9160DK_NRF52840_RESET - -comment "nRF52840 pins" - -config BOARD_NRF9160DK_NRF52840_RESET_P0_17 - bool "P0.17" - depends on BOARD_NRF9160DK_INTERFACE0_MCU - help - Pin P0.17 on nRF52840, - connected to P0.17 on the nRF9160. - -config BOARD_NRF9160DK_NRF52840_RESET_P0_20 - bool "P0.20" - depends on BOARD_NRF9160DK_INTERFACE0_MCU - help - Pin P0.20 on nRF52840, - connected to P0.18 on the nRF9160. - -config BOARD_NRF9160DK_NRF52840_RESET_P0_15 - bool "P0.15" - depends on BOARD_NRF9160DK_INTERFACE0_MCU - help - Pin P0.15 on nRF52840, - connected to P0.19 on the nRF9160. - -config BOARD_NRF9160DK_NRF52840_RESET_P0_22 - bool "P0.22" - depends on BOARD_NRF9160DK_INTERFACE1_MCU - help - Pin P0.22 on nRF52840, - connected to P0.21 on the nRF9160. - -config BOARD_NRF9160DK_NRF52840_RESET_P1_04 - bool "P1.04" - depends on BOARD_NRF9160DK_INTERFACE1_MCU - help - Pin P1.04 on nRF52840, - connected to P0.22 on the nRF9160. - -config BOARD_NRF9160DK_NRF52840_RESET_P1_02 - bool "P1.02" - depends on BOARD_NRF9160DK_INTERFACE1_MCU - help - Pin P1.02 on nRF52840, - connected to P0.23 on the nRF9160. - -endchoice - module = BOARD_NRF9160DK module-str = Board Control source "subsys/logging/Kconfig.template.log_config" diff --git a/boards/arm/nrf9160dk_nrf52840/Kconfig.defconfig b/boards/arm/nrf9160dk_nrf52840/Kconfig.defconfig index 477277d8064..dc3c3c3caae 100644 --- a/boards/arm/nrf9160dk_nrf52840/Kconfig.defconfig +++ b/boards/arm/nrf9160dk_nrf52840/Kconfig.defconfig @@ -11,4 +11,7 @@ config BOARD config BT_CTLR default BT +config BT_WAIT_NOP + default BT && $(dt_nodelabel_enabled,reset_input) + endif # BOARD_NRF9160DK_NRF52840 diff --git a/boards/arm/nrf9160dk_nrf52840/board.c b/boards/arm/nrf9160dk_nrf52840/board.c index 3cb162e6444..eb54138a1d1 100644 --- a/boards/arm/nrf9160dk_nrf52840/board.c +++ b/boards/arm/nrf9160dk_nrf52840/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 Nordic Semiconductor ASA. + * Copyright (c) 2018-2021 Nordic Semiconductor ASA. * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,197 +7,79 @@ #include #include #include +#include #include LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_NRF9160DK_LOG_LEVEL); -/* The following pins on the nRF52840 control the routing of certain - * components/lines on the nRF9160 DK. They are specified as follows: - * - * COMPONENT_SWITCH : ROUTING PIN - * - * NOTE: UART1_VCOM_U7 is on pin 12 of both P0 and P1. - * Both P0.12 -and- P1.12 need to be toggled to route UART1 to VCOM2. - */ +#define GET_CTLR(name, prop, idx) \ + DT_GPIO_CTLR_BY_IDX(DT_NODELABEL(name), prop, idx) +#define GET_PIN(name, prop, idx) \ + DT_GPIO_PIN_BY_IDX(DT_NODELABEL(name), prop, idx) +#define GET_PORT(name, prop, idx) \ + DT_PROP_BY_PHANDLE_IDX(DT_NODELABEL(name), prop, idx, port) +#define GET_FLAGS(name, prop, idx) \ + DT_GPIO_FLAGS_BY_IDX(DT_NODELABEL(name), prop, idx) +#define GET_DEV(name, prop, idx) DEVICE_DT_GET(GET_CTLR(name, prop, idx)) -/* GPIO pins on Port 0 */ +#define USE_RESET_GPIO DT_NODE_HAS_STATUS(DT_NODELABEL(reset_input), okay) -#define INTERFACE0_U5 13 /* MCU interface pins 0 - 2 */ -#define INTERFACE1_U6 24 /* MCU interface pins 3 - 5 */ -#define UART1_VCOM_U7 12 /* Route nRF9160 UART1 to VCOM2 */ -#define BUTTON1_U12 6 -#define BUTTON2_U12 26 -#define SWITCH2_U9 8 - -/* GPIO pins on Port 1 */ - -#define INTERFACE2_U21 10 /* COEX interface pins 6 - 8 */ -#define UART0_VCOM_U14 14 /* Route nRF9160 UART0 to VCOM0 */ -#define UART1_VCOM_U7 12 /* Route nRF9160 UART1 to VCOM2 */ -#define LED1_U8 5 -#define LED2_U8 7 -#define LED3_U11 1 -#define LED4_U11 3 -#define SWITCH1_U9 9 - -/* MCU interface pins - * These pins can be used for inter-SoC communication. - * - * | nRF9160 | | nRF52840 | nRF9160 DK | - * | P0.17 | -- MCU Interface Pin 0 -- | P0.17 | Arduino 4 | - * | P0.18 | -- MCU Interface Pin 1 -- | P0.20 | Arduino 5 | - * | P0.19 | -- MCU Interface Pin 2 -- | P0.15 | Arduino 6 | - * | P0.21 | -- MCU Interface Pin 3 -- | P0.22 | TRACECLK | - * | P0.22 | -- MCU Interface Pin 4 -- | P1.04 | TRACEDATA0 | - * | P0.23 | -- MCU Interface Pin 5 -- | P1.02 | TRACEDATA1 | - * | COEX0 | -- MCU Interface Pin 6 -- | P1.13 | COEX0_PH | - * | COEX1 | -- MCU Interface Pin 7 -- | P1.11 | COEX1_PH | - * | COEX2 | -- MCU Interface Pin 8 -- | P1.15 | COEX2_PH | - */ - -__packed struct pin_config { - uint8_t pin; - uint8_t val; +struct switch_cfg { + const struct device *gpio; + gpio_pin_t pin; + gpio_dt_flags_t flags; + bool on; +#if IS_ENABLED(CONFIG_LOG) + uint8_t port; + bool info; + const char *name; +#endif }; -/* The following tables specify the configuration of each pin based on the - * Kconfig options that drive it. - * The switches have active-low logic, so when writing to the port we will - * need to invert the value to match the IS_ENABLED() logic. - */ - -static const struct pin_config pins_on_p0[] = { - { INTERFACE0_U5, IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE0_ARDUINO) }, - { INTERFACE1_U6, IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE1_TRACE) }, - { UART1_VCOM_U7, IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART1_ARDUINO) }, - { BUTTON1_U12, IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON0_PHY) }, - { BUTTON2_U12, IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON1_PHY) }, - { SWITCH2_U9, IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH1_PHY) }, -}; - -static const struct pin_config pins_on_p1[] = { - { INTERFACE2_U21, IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE2_COEX) }, - { UART0_VCOM_U14, IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART0_VCOM) }, - { UART1_VCOM_U7, IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART1_ARDUINO) }, - { LED1_U8, IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED0_PHY) }, - { LED2_U8, IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED1_PHY) }, - { LED3_U11, IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED2_PHY) }, - { LED4_U11, IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED3_PHY) }, - { SWITCH1_U9, IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH0_PHY) }, -}; - -static void config_print(void) -{ - /* Interface pins 0-2 */ - LOG_INF("Routing interface pins 0-2 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE0_MCU) ? - "nRF52840" : - "Arduino headers", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE0_MCU)); - - /* Interface pins 3-5 */ - LOG_INF("Routing interface pins 3-5 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE1_MCU) ? - "nRF52840" : - "TRACE header", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE1_MCU)); - - /* Interface pins 6-8 */ - LOG_INF("Routing interface pins 6-8 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE2_MCU) ? - "nRF52840" : - "COEX header", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE2_MCU)); - - LOG_INF("Routing nRF9160 UART0 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART0_ARDUINO) ? - "Arduino pin headers" : - "VCOM0", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART0_ARDUINO)); - - LOG_INF("Routing nRF9160 UART1 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART1_ARDUINO) ? - "Arduino pin headers" : - "VCOM2", - /* defaults to arduino pins */ - IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART1_VCOM)); - - LOG_INF("Routing nRF9160 LED 1 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED0_ARDUINO) ? - "Arduino pin headers" : - "physical LED", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED0_ARDUINO)); - - LOG_INF("Routing nRF9160 LED 2 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED1_ARDUINO) ? - "Arduino pin headers" : - "physical LED", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED1_ARDUINO)); - - LOG_INF("Routing nRF9160 LED 3 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED2_ARDUINO) ? - "Arduino pin headers" : - "physical LED", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED2_ARDUINO)); - - LOG_INF("Routing nRF9160 LED 4 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED3_ARDUINO) ? - "Arduino pin headers" : - "physical LED", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED3_ARDUINO)); - - LOG_INF("Routing nRF9160 button 1 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON0_ARDUINO) ? - "Arduino pin headers" : - "physical button", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON0_ARDUINO)); - - LOG_INF("Routing nRF9160 button 2 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON1_ARDUINO) ? - "Arduino pin headers" : - "physical button", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON1_ARDUINO)); - - LOG_INF("Routing nRF9160 switch 1 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH0_ARDUINO) ? - "Arduino pin headers" : - "physical switch", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH0_ARDUINO)); - - LOG_INF("Routing nRF9160 switch 2 to %s (pin -> %d)", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH1_ARDUINO) ? - "Arduino pin headers" : - "physical switch", - IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH1_ARDUINO)); +#define ROUTING_ENABLED(_name) DT_NODE_HAS_STATUS(DT_NODELABEL(_name), okay) +#define SWITCH_CFG(_name, _idx) \ +{ \ + .gpio = GET_DEV(_name, control_gpios, _idx), \ + .pin = GET_PIN(_name, control_gpios, _idx), \ + .flags = GET_FLAGS(_name, control_gpios, _idx), \ + .on = ROUTING_ENABLED(_name), \ + COND_CODE_1(CONFIG_LOG, \ + ( \ + .port = GET_PORT(_name, control_gpios, _idx), \ + .info = (_idx == 0), \ + .name = #_name, \ + ), ()) \ } +#define HAS_TWO_PINS(_name) \ + DT_PHA_HAS_CELL_AT_IDX(DT_NODELABEL(_name), control_gpios, 1, pin) -static int pins_configure(const struct device *port, - const struct pin_config cfg[], - size_t pins) -{ - int err; +#define ROUTING_SWITCH(_name) \ + COND_CODE_1(DT_NODE_EXISTS(DT_NODELABEL(_name)), \ + ( \ + COND_CODE_1(HAS_TWO_PINS(_name), \ + ( \ + SWITCH_CFG(_name, 1), \ + ), ()) \ + SWITCH_CFG(_name, 0), \ + ), ()) - for (size_t i = 0; i < pins; i++) { - /* A given pin controlling the switch needs to be driven - * to the low state to activate the routing indicated by - * the corresponding IS_ENABLED() macro in the table, - * so configure the pin as output with the proper initial - * state. - */ - uint32_t flag = (cfg[i].val ? GPIO_OUTPUT_LOW - : GPIO_OUTPUT_HIGH); - err = gpio_pin_configure(port, cfg[i].pin, flag); - if (err) { - return cfg[i].pin; - } - - LOG_DBG("port %p, pin %u -> %u", - port, cfg[i].pin, !cfg[i].val); - } - - return 0; -} +static const struct switch_cfg routing_switches[] = { + ROUTING_SWITCH(vcom0_pins_routing) + ROUTING_SWITCH(vcom2_pins_routing) + ROUTING_SWITCH(led1_pin_routing) + ROUTING_SWITCH(led2_pin_routing) + ROUTING_SWITCH(led3_pin_routing) + ROUTING_SWITCH(led4_pin_routing) + ROUTING_SWITCH(switch1_pin_routing) + ROUTING_SWITCH(switch2_pin_routing) + ROUTING_SWITCH(button1_pin_routing) + ROUTING_SWITCH(button2_pin_routing) + ROUTING_SWITCH(nrf_interface_pins_0_2_routing) + ROUTING_SWITCH(nrf_interface_pins_3_5_routing) + ROUTING_SWITCH(nrf_interface_pins_6_8_routing) +}; +#if USE_RESET_GPIO static void chip_reset(const struct device *gpio, struct gpio_callback *cb, uint32_t pins) { @@ -209,127 +91,105 @@ static void chip_reset(const struct device *gpio, NVIC_SystemReset(); } -static void reset_pin_wait_low(const struct device *port, uint32_t pin) +static void reset_pin_wait_inactive(const struct device *gpio, uint32_t pin) { int val; - /* Wait until the pin is pulled low */ + /* Wait until the pin becomes inactive. */ do { - val = gpio_pin_get_raw(port, pin); + val = gpio_pin_get(gpio, pin); } while (val > 0); } -static int reset_pin_configure(const struct device *p0, - const struct device *p1) +static int reset_pin_configure(void) { - int err; - uint32_t pin = 0; - const struct device *port = NULL; - + int rc; static struct gpio_callback gpio_ctx; - /* MCU interface pins 0-2 */ - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_17)) { - port = p0; - pin = 17; - } - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_20)) { - port = p0; - pin = 20; - } - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_15)) { - port = p0; - pin = 15; - } - /* MCU interface pins 3-6 */ - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_22)) { - port = p0; - pin = 22; - } - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P1_04)) { - port = p1; - pin = 4; - } - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P1_02)) { - port = p1; - pin = 2; + const struct device *gpio = GET_DEV(reset_input, gpios, 0); + gpio_pin_t pin = GET_PIN(reset_input, gpios, 0); + gpio_dt_flags_t flags = GET_FLAGS(reset_input, gpios, 0); + + if (!device_is_ready(gpio)) { + LOG_ERR("%s is not ready", gpio->name); + return -ENODEV; } - __ASSERT_NO_MSG(port != NULL); - - err = gpio_pin_configure(port, pin, GPIO_INPUT | GPIO_PULL_DOWN); - if (err) { - return err; + rc = gpio_pin_configure(gpio, pin, flags | GPIO_INPUT); + if (rc) { + LOG_ERR("Error %d while configuring pin P%d.%02d", + rc, GET_PORT(reset_input, gpios, 0), pin); + return rc; } gpio_init_callback(&gpio_ctx, chip_reset, BIT(pin)); - err = gpio_add_callback(port, &gpio_ctx); - if (err) { - return err; + rc = gpio_add_callback(gpio, &gpio_ctx); + if (rc) { + return rc; } - err = gpio_pin_interrupt_configure(port, pin, GPIO_INT_EDGE_RISING); - if (err) { - return err; + rc = gpio_pin_interrupt_configure(gpio, pin, GPIO_INT_EDGE_TO_ACTIVE); + if (rc) { + return rc; } - /* Wait until the pin is pulled low before continuing. + LOG_INF("GPIO reset line enabled on pin P%d.%02d, holding...", + GET_PORT(reset_input, gpios, 0), pin); + + /* Wait until the pin becomes inactive before continuing. * This lets the other side ensure that they are ready. */ - LOG_INF("GPIO reset line enabled on pin %s.%02u, holding..", - port == p0 ? "P0" : "P1", pin); - - reset_pin_wait_low(port, pin); + reset_pin_wait_inactive(gpio, pin); return 0; } +#endif /* USE_RESET_GPIO */ static int init(const struct device *dev) { int rc; - const struct device *p0; - const struct device *p1; - p0 = device_get_binding(DT_LABEL(DT_NODELABEL(gpio0))); - if (!p0) { - LOG_ERR("GPIO device " DT_LABEL(DT_NODELABEL(gpio0)) - " not found!"); - return -EIO; - } + for (int i = 0; i < ARRAY_SIZE(routing_switches); ++i) { + const struct switch_cfg *cfg = &routing_switches[i]; + gpio_flags_t flags = cfg->flags; - p1 = device_get_binding(DT_LABEL(DT_NODELABEL(gpio1))); - if (!p1) { - LOG_ERR("GPIO device " DT_LABEL(DT_NODELABEL(gpio1)) - " not found!"); - return -EIO; - } + if (!device_is_ready(cfg->gpio)) { + LOG_ERR("%s is not ready", cfg->gpio->name); + return -ENODEV; + } - /* Configure pins on each port */ - rc = pins_configure(p0, pins_on_p0, ARRAY_SIZE(pins_on_p0)); - if (rc) { - LOG_ERR("Error while configuring pin P0.%02d", rc); - return -EIO; + flags |= (cfg->on ? GPIO_OUTPUT_ACTIVE + : GPIO_OUTPUT_INACTIVE); + rc = gpio_pin_configure(cfg->gpio, cfg->pin, flags); +#if IS_ENABLED(CONFIG_LOG) + LOG_DBG("Configuring P%d.%02d with flags: 0x%08x", + cfg->port, cfg->pin, flags); + if (rc) { + LOG_ERR("Error %d while configuring pin P%d.%02d (%s)", + rc, cfg->port, cfg->pin, cfg->name); + } else if (cfg->info) { + LOG_INF("%s is %s", + cfg->name, cfg->on ? "ENABLED" : "disabled"); + } +#endif + if (rc) { + return rc; + } } - rc = pins_configure(p1, pins_on_p1, ARRAY_SIZE(pins_on_p1)); - if (rc) { - LOG_ERR("Error while configuring pin P1.%02d", rc); - return -EIO; - } - - config_print(); /* Make sure to configure the switches before initializing * the GPIO reset pin, so that we are connected to * the nRF9160 before enabling our interrupt. */ - if (IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET)) { - rc = reset_pin_configure(p0, p1); - if (rc) { - LOG_ERR("Unable to configure reset pin, err %d", rc); - return -EIO; - } + +#if USE_RESET_GPIO + rc = reset_pin_configure(); + if (rc) { + LOG_ERR("Unable to configure reset pin, err %d", rc); + return -EIO; } +#endif LOG_INF("Board configured."); diff --git a/boards/arm/nrf9160dk_nrf52840/doc/index.rst b/boards/arm/nrf9160dk_nrf52840/doc/index.rst index 0adffb98e86..399999cbca3 100644 --- a/boards/arm/nrf9160dk_nrf52840/doc/index.rst +++ b/boards/arm/nrf9160dk_nrf52840/doc/index.rst @@ -119,41 +119,127 @@ with a Segger IC. Remember to set the PROG/DEBUG switch on the DK to nRF52. +.. _nrf9160dk_board_controller_firmware: + Board controller firmware ************************* The board controller firmware is a small snippet of code that takes care of -routing specific pins on nRF9160 SiP to different components on the board, -such as LEDs, switches, and specific nRF52840 SoC pins. +routing specific pins of the nRF9160 SiP to different components on the DK, +such as LEDs and buttons, UART interfaces (VCOMx) of the interface MCU, and +specific nRF52840 SoC pins. + +.. note:: + nRF9160 signals routed to other components on the DK are not simultaneously + available on the DK connectors. When compiling a project for nrf9160dk_nrf52840, the board controller firmware will be compiled and run automatically after the Kernel has been initialized. By default, the board controller firmware will route the following: -+-----------------+----------------------------------+ -| Component | Routed to | -+=================+==================================+ -| nRF9160 UART0 | VCOM0 | -+-----------------+----------------------------------+ -| nRF9160 UART1 | VCOM2 | -+-----------------+----------------------------------+ -| LEDs 1-4 | physical LEDs | -+-----------------+----------------------------------+ -| Buttons 1-2 | physical buttons | -+-----------------+----------------------------------+ -| Switches 1-2 | physical switches | -+-----------------+----------------------------------+ -| MCU Interface 0 | Arduino pin headers | -+-----------------+----------------------------------+ -| MCU Interface 1 | Trace interface | -+-----------------+----------------------------------+ -| MCU Interface 2 | COEX interface | -+-----------------+----------------------------------+ ++--------------------------------+----------------------------------+ +| nRF9160 pins | Routed to | ++================================+==================================+ +| P0.26, P0.27, P0.28, and P0.29 | VCOM0 | ++--------------------------------+----------------------------------+ +| P0.01, P0.00, P0.15, and P0.14 | VCOM2 | ++--------------------------------+----------------------------------+ +| P0.02 | LED1 | ++--------------------------------+----------------------------------+ +| P0.03 | LED2 | ++--------------------------------+----------------------------------+ +| P0.04 | LED3 | ++--------------------------------+----------------------------------+ +| P0.05 | LED4 | ++--------------------------------+----------------------------------+ +| P0.08 | Switch 1 | ++--------------------------------+----------------------------------+ +| P0.09 | Switch 2 | ++--------------------------------+----------------------------------+ +| P0.06 | Button 1 | ++--------------------------------+----------------------------------+ +| P0.07 | Button 2 | ++--------------------------------+----------------------------------+ +| P0.17, P0.18, and P0.19 | Arduino pin headers | ++--------------------------------+----------------------------------+ +| P0.21, P0.22, and P0.23 | Trace interface | ++--------------------------------+----------------------------------+ +| COEX0, COEX1, and COEX2 | COEX interface | ++--------------------------------+----------------------------------+ -It is possible to configure the behavior of the board controller firmware by -using Kconfig and editing its options under "Board options". +For a complete list of all the routing options available, +see the `nRF9160 DK board control section in the nRF9160 DK User Guide`_. +If you want to route some of the above pins differently or enable any of the +other available routing options, enable or disable the devicetree node that +represents the analog switch that provides the given routing. + +The following devicetree nodes are defined for the analog switches present +on the nRF9160 DK: + ++------------------------------------+------------------------------+ +| Devicetree node label | Analog switch name | ++====================================+==============================+ +| ``vcom0_pins_routing`` | nRF91_UART1 (nRF91_APP1) | ++------------------------------------+------------------------------+ +| ``vcom2_pins_routing`` | nRF91_UART2 (nRF91_APP2) | ++------------------------------------+------------------------------+ +| ``led1_pin_routing`` | nRF91_LED1 | ++------------------------------------+------------------------------+ +| ``led2_pin_routing`` | nRF91_LED2 | ++------------------------------------+------------------------------+ +| ``led3_pin_routing`` | nRF91_LED3 | ++------------------------------------+------------------------------+ +| ``led4_pin_routing`` | nRF91_LED4 | ++------------------------------------+------------------------------+ +| ``switch1_pin_routing`` | nRF91_SWITCH1 | ++------------------------------------+------------------------------+ +| ``switch2_pin_routing`` | nRF91_SWITCH2 | ++------------------------------------+------------------------------+ +| ``button1_pin_routing`` | nRF91_BUTTON1 | ++------------------------------------+------------------------------+ +| ``button2_pin_routing`` | nRF91_BUTTON2 | ++------------------------------------+------------------------------+ +| ``nrf_interface_pins_0_2_routing`` | nRF_IF0-2_CTRL (nRF91_GPIO) | ++------------------------------------+------------------------------+ +| ``nrf_interface_pins_3_5_routing`` | nRF_IF3-5_CTRL (nRF91_TRACE) | ++------------------------------------+------------------------------+ +| ``nrf_interface_pins_6_8_routing`` | nRF_IF6-8_CTRL (nRF91_COEX) | ++------------------------------------+------------------------------+ + +For example, if you want to enable the optional routing for the nRF9160 pins +P0.17, P0.18, and P0.19 so that they are routed to nRF52840 pins P0.17, P0.20, +and P0.15, respectively, add the following in the devicetree overlay in your +application: + +.. code-block:: none + + &nrf_interface_pins_0_2_routing { + status = "okay"; + }; + +And if you want to, for example, disable routing for the VCOM2 pins, add the +following: + +.. code-block:: none + + &vcom2_pins_routing { + status = "disabled"; + }; + +A few helper .dtsi files are provided in the directories +:zephyr_file:`boards/arm/nrf9160dk_nrf52840/dts` and +:zephyr_file:`boards/arm/nrf9160dk_nrf9160/dts`. They can serve as examples of +how to configure and use the above routings. You can also include them from +respective devicetree overlay files in your applications to conveniently +configure the signal routing between nRF9160 and nRF52840 on the nRF9160 DK. +For example, to use ``uart1`` on both these chips for communication between +them, add the following line in the overlays for applications on both sides: + +.. code-block:: none + + #include References ********** @@ -162,3 +248,4 @@ References .. _Nordic Low power cellular IoT: https://www.nordicsemi.com/Products/Low-power-cellular-IoT .. _Nordic Semiconductor Infocenter: https://infocenter.nordicsemi.com .. _J-Link Software and documentation pack: https://www.segger.com/jlink-software.html +.. _nRF9160 DK board control section in the nRF9160 DK User Guide: https://infocenter.nordicsemi.com/topic/ug_nrf91_dk/UG/nrf91_DK/board_controller.html diff --git a/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-nrf52840-interface.yaml b/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-nrf52840-interface.yaml new file mode 100644 index 00000000000..47416167ea0 --- /dev/null +++ b/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-nrf52840-interface.yaml @@ -0,0 +1,35 @@ +# Copyright (c) 2021 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# NOTE: This file is replicated in nrf9160dk_nrf9160 and nrf9160dk_nrf52840. +# Any changes should be done in both instances. + +description: | + nRF9160 DK GPIO interface between nRF9160 and nRF52840 + + This interface can be used for inter-SoC communication on the DK. + The connections are as follows: + + | nRF9160 | | nRF52840 | + | P0.17 | -- nRF interface line 0 -- | P0.17 | + | P0.18 | -- nRF interface line 1 -- | P0.20 | + | P0.19 | -- nRF interface line 2 -- | P0.15 | + | P0.21 | -- nRF interface line 3 -- | P0.22 | + | P0.22 | -- nRF interface line 4 -- | P1.04 | + | P0.23 | -- nRF interface line 5 -- | P1.02 | + | COEX0 | -- nRF interface line 6 -- | P1.13 | + | COEX1 | -- nRF interface line 7 -- | P1.11 | + | COEX2 | -- nRF interface line 8 -- | P1.15 | + + Before particular lines of this interface can be used, the corresponding + analog switches that control the routing of involved nRF9160 pins must be + configured to provide the optional routing (i.e. to nRF52840). To achieve + this, set the status of respective devicetree nodes in the firmware for + the nrf9160dk_nrf52840 board to "okay": + - `nrf_interface_pins_0_2_routing` to enable lines 0-2 + - `nrf_interface_pins_3_5_routing` to enable lines 3-5 + - `nrf_interface_pins_6_8_routing` to enable lines 6-8 + +compatible: "nordic,nrf9160dk-nrf52840-interface" + +include: [gpio-nexus.yaml, base.yaml] diff --git a/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-nrf52840-reset.yaml b/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-nrf52840-reset.yaml new file mode 100644 index 00000000000..1804fc51d4a --- /dev/null +++ b/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-nrf52840-reset.yaml @@ -0,0 +1,21 @@ +# Copyright (c) 2021 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# NOTE: This file is replicated in nrf9160dk_nrf9160 and nrf9160dk_nrf52840. +# Any changes should be done in both instances. + +description: GPIO used to reset nRF52840 on nRF9160 DK + +compatible: "nordic,nrf9160dk-nrf52840-reset" + +include: base.yaml + +properties: + status: + required: true + + gpios: + type: phandle-array + required: true + description: | + GPIO to use as nRF52840 reset line: output in nRF9160, input in nRF52840. diff --git a/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-optional-routing.yaml b/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-optional-routing.yaml new file mode 100644 index 00000000000..3011b9321ef --- /dev/null +++ b/boards/arm/nrf9160dk_nrf52840/dts/bindings/nordic,nrf9160dk-optional-routing.yaml @@ -0,0 +1,18 @@ +# Copyright 2021 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: nRF9160 DK optional routing provided by analog switch + +compatible: "nordic,nrf9160dk-optional-routing" + +include: base.yaml + +properties: + status: + required: true + + control-gpios: + type: phandle-array + required: true + description: | + GPIO to use to control the analog switch. diff --git a/boards/arm/nrf9160dk_nrf52840/dts/nrf9160dk_nrf52840_reset_on_if5.dtsi b/boards/arm/nrf9160dk_nrf52840/dts/nrf9160dk_nrf52840_reset_on_if5.dtsi new file mode 100644 index 00000000000..c5df7a07465 --- /dev/null +++ b/boards/arm/nrf9160dk_nrf52840/dts/nrf9160dk_nrf52840_reset_on_if5.dtsi @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&nrf_interface_pins_3_5_routing { + status = "okay"; +}; + +&reset_input { + status = "okay"; + gpios = <&interface_to_nrf9160 5 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; +}; diff --git a/boards/arm/nrf9160dk_nrf52840/dts/nrf9160dk_uart1_on_if0_3.dtsi b/boards/arm/nrf9160dk_nrf52840/dts/nrf9160dk_uart1_on_if0_3.dtsi new file mode 100644 index 00000000000..8327fd52a3a --- /dev/null +++ b/boards/arm/nrf9160dk_nrf52840/dts/nrf9160dk_uart1_on_if0_3.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&nrf_interface_pins_0_2_routing { + status = "okay"; +}; + +&nrf_interface_pins_3_5_routing { + status = "okay"; +}; + +&uart1 { + status = "okay"; + tx-pin = <17>; /* <&interface_to_nrf9160 0 0>; */ + rx-pin = <20>; /* <&interface_to_nrf9160 1 0>; */ + rts-pin = <15>; /* <&interface_to_nrf9160 2 0>; */ + cts-pin = <22>; /* <&interface_to_nrf9160 3 0>; */ +}; diff --git a/boards/arm/nrf9160dk_nrf52840/integrity.c b/boards/arm/nrf9160dk_nrf52840/integrity.c deleted file mode 100644 index 093cce8dadb..00000000000 --- a/boards/arm/nrf9160dk_nrf52840/integrity.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2018-2020 Nordic Semiconductor ASA. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -/* The following asserts ensure compile-time consistency between the macros - * used in board.c and the ones defined in Kconfig. - */ - -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE0_MCU) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE0_ARDUINO), - "Invalid MCU interface 0 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE1_MCU) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE1_TRACE), - "Invalid MCU interface 1 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE2_MCU) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_INTERFACE2_COEX), - "Invalid MCU interface 2 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART0_VCOM) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART0_ARDUINO), - "Invalid nRF9160 UART0 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART1_VCOM) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_UART1_ARDUINO), - "Invalid nRF9160 UART1 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED0_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED0_ARDUINO), - "Invalid LED 1 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED1_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED1_ARDUINO), - "Invalid LED 2 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED2_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED2_ARDUINO), - "Invalid LED 3 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED3_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_LED3_ARDUINO), - "Invalid LED 4 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON0_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON0_ARDUINO), - "Invalid button 1 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON1_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_BUTTON1_ARDUINO), - "Invalid button 2 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH0_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH0_ARDUINO), - "Invalid switch 1 routing"); -BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH1_PHY) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_SWITCH1_ARDUINO), - "Invalid switch 2 routing"); - -BUILD_ASSERT(!IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_17) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_20) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_15) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P0_22) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P1_04) || - IS_ENABLED(CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P1_02), - "No reset line selected, please check Kconfig macros"); diff --git a/boards/arm/nrf9160dk_nrf52840/nrf9160dk_nrf52840.dts b/boards/arm/nrf9160dk_nrf52840/nrf9160dk_nrf52840.dts index bf0753a1812..0983e669cc7 100644 --- a/boards/arm/nrf9160dk_nrf52840/nrf9160dk_nrf52840.dts +++ b/boards/arm/nrf9160dk_nrf52840/nrf9160dk_nrf52840.dts @@ -20,6 +20,118 @@ zephyr,sram = &sram0; zephyr,flash = &flash0; }; + + interface_to_nrf9160: gpio-interface { + compatible = "nordic,nrf9160dk-nrf52840-interface"; + #gpio-cells = <2>; + gpio-map-mask = <0xf 0>; + gpio-map-pass-thru = <0 0xffffffff>; + gpio-map = <0 0 &gpio0 17 0>, + <1 0 &gpio0 20 0>, + <2 0 &gpio0 15 0>, + <3 0 &gpio0 22 0>, + <4 0 &gpio1 4 0>, + <5 0 &gpio1 2 0>, + <6 0 &gpio1 13 0>, + <7 0 &gpio1 11 0>, + <8 0 &gpio1 15 0>; + }; + + reset_input: gpio-reset { + compatible = "nordic,nrf9160dk-nrf52840-reset"; + /* + * This line is specified as active high for compatibility + * with the previously used Kconfig-based configuration. + */ + gpios = <&interface_to_nrf9160 5 + (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; + status = "disabled"; + }; + + board-control { + vcom0_pins_routing: switch-nrf91-uart1 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + vcom2_pins_routing: switch-nrf91-uart2 { + compatible = "nordic,nrf9160dk-optional-routing"; + /* + * Two pins (P1.12 and P0.12) need to be driven for + * this switch. + */ + control-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>, + <&gpio0 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + led1_pin_routing: switch-nrf91-led1 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + led2_pin_routing: switch-nrf91-led2 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + led3_pin_routing: switch-nrf91-led3 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + led4_pin_routing: switch-nrf91-led4 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + switch1_pin_routing: switch-nrf91-switch1 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + switch2_pin_routing: switch-nrf91-switch2 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + button1_pin_routing: switch-nrf91-button1 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + button2_pin_routing: switch-nrf91-button2 { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + nrf_interface_pins_0_2_routing: switch-nrf-if0-2-ctrl { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + nrf_interface_pins_3_5_routing: switch-nrf-if3-5-ctrl { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + nrf_interface_pins_6_8_routing: switch-nrf-if6-8-ctrl { + compatible = "nordic,nrf9160dk-optional-routing"; + control-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + }; }; &gpiote { diff --git a/boards/arm/nrf9160dk_nrf9160/CMakeLists.txt b/boards/arm/nrf9160dk_nrf9160/CMakeLists.txt index 55667d7bb40..75fa51e564c 100644 --- a/boards/arm/nrf9160dk_nrf9160/CMakeLists.txt +++ b/boards/arm/nrf9160dk_nrf9160/CMakeLists.txt @@ -1,7 +1,5 @@ # Copyright (c) 2019 Nordic Semiconductor ASA. # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_BOARD_NRF52840_GPIO_RESET) - zephyr_library() - zephyr_library_sources(nrf52840_reset.c) -endif() +zephyr_library() +zephyr_library_sources(nrf52840_reset.c) diff --git a/boards/arm/nrf9160dk_nrf9160/Kconfig b/boards/arm/nrf9160dk_nrf9160/Kconfig deleted file mode 100644 index 6cc5219eba8..00000000000 --- a/boards/arm/nrf9160dk_nrf9160/Kconfig +++ /dev/null @@ -1,21 +0,0 @@ -# nRF9160 DK board configuration - -# Copyright (c) 2018 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_NRF52840_GPIO_RESET - bool "Use nRF52840 GPIO reset pin" - default y if BT_H4 - depends on BOARD_NRF9160DK_NRF9160 || BOARD_NRF9160DK_NRF9160NS - help - Use a GPIO pin to reset the nRF52840 controller and let it wait until all - bytes traveling to the H4 device have been received and drained, thus - ensuring communication can begin correctly. - -config BOARD_NRF52840_GPIO_RESET_PIN - int "Reset pin" - range 17 23 - default 23 - depends on BOARD_NRF52840_GPIO_RESET - help - GPIO pin on the nRF9160 used to reset the nRF52840. diff --git a/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig b/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig index 0429ea60711..70fb9873ab5 100644 --- a/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig +++ b/boards/arm/nrf9160dk_nrf9160/Kconfig.defconfig @@ -38,4 +38,7 @@ endif # BOARD_NRF9160DK_NRF9160NS config BT_HCI_VS default y if BT +config BT_WAIT_NOP + default BT && $(dt_nodelabel_enabled,nrf52840_reset) + endif # BOARD_NRF9160DK_NRF9160 || BOARD_NRF9160DK_NRF9160NS diff --git a/boards/arm/nrf9160dk_nrf9160/dts/bindings/nordic,nrf9160dk-nrf52840-interface.yaml b/boards/arm/nrf9160dk_nrf9160/dts/bindings/nordic,nrf9160dk-nrf52840-interface.yaml new file mode 100644 index 00000000000..47416167ea0 --- /dev/null +++ b/boards/arm/nrf9160dk_nrf9160/dts/bindings/nordic,nrf9160dk-nrf52840-interface.yaml @@ -0,0 +1,35 @@ +# Copyright (c) 2021 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# NOTE: This file is replicated in nrf9160dk_nrf9160 and nrf9160dk_nrf52840. +# Any changes should be done in both instances. + +description: | + nRF9160 DK GPIO interface between nRF9160 and nRF52840 + + This interface can be used for inter-SoC communication on the DK. + The connections are as follows: + + | nRF9160 | | nRF52840 | + | P0.17 | -- nRF interface line 0 -- | P0.17 | + | P0.18 | -- nRF interface line 1 -- | P0.20 | + | P0.19 | -- nRF interface line 2 -- | P0.15 | + | P0.21 | -- nRF interface line 3 -- | P0.22 | + | P0.22 | -- nRF interface line 4 -- | P1.04 | + | P0.23 | -- nRF interface line 5 -- | P1.02 | + | COEX0 | -- nRF interface line 6 -- | P1.13 | + | COEX1 | -- nRF interface line 7 -- | P1.11 | + | COEX2 | -- nRF interface line 8 -- | P1.15 | + + Before particular lines of this interface can be used, the corresponding + analog switches that control the routing of involved nRF9160 pins must be + configured to provide the optional routing (i.e. to nRF52840). To achieve + this, set the status of respective devicetree nodes in the firmware for + the nrf9160dk_nrf52840 board to "okay": + - `nrf_interface_pins_0_2_routing` to enable lines 0-2 + - `nrf_interface_pins_3_5_routing` to enable lines 3-5 + - `nrf_interface_pins_6_8_routing` to enable lines 6-8 + +compatible: "nordic,nrf9160dk-nrf52840-interface" + +include: [gpio-nexus.yaml, base.yaml] diff --git a/boards/arm/nrf9160dk_nrf9160/dts/bindings/nordic,nrf9160dk-nrf52840-reset.yaml b/boards/arm/nrf9160dk_nrf9160/dts/bindings/nordic,nrf9160dk-nrf52840-reset.yaml new file mode 100644 index 00000000000..1804fc51d4a --- /dev/null +++ b/boards/arm/nrf9160dk_nrf9160/dts/bindings/nordic,nrf9160dk-nrf52840-reset.yaml @@ -0,0 +1,21 @@ +# Copyright (c) 2021 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# NOTE: This file is replicated in nrf9160dk_nrf9160 and nrf9160dk_nrf52840. +# Any changes should be done in both instances. + +description: GPIO used to reset nRF52840 on nRF9160 DK + +compatible: "nordic,nrf9160dk-nrf52840-reset" + +include: base.yaml + +properties: + status: + required: true + + gpios: + type: phandle-array + required: true + description: | + GPIO to use as nRF52840 reset line: output in nRF9160, input in nRF52840. diff --git a/boards/arm/nrf9160dk_nrf9160/dts/nrf9160dk_nrf52840_reset_on_if5.dtsi b/boards/arm/nrf9160dk_nrf9160/dts/nrf9160dk_nrf52840_reset_on_if5.dtsi new file mode 100644 index 00000000000..7943664c4cb --- /dev/null +++ b/boards/arm/nrf9160dk_nrf9160/dts/nrf9160dk_nrf52840_reset_on_if5.dtsi @@ -0,0 +1,10 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&nrf52840_reset { + status = "okay"; + gpios = <&interface_to_nrf52840 5 GPIO_ACTIVE_HIGH>; +}; diff --git a/boards/arm/nrf9160dk_nrf9160/dts/nrf9160dk_uart1_on_if0_3.dtsi b/boards/arm/nrf9160dk_nrf9160/dts/nrf9160dk_uart1_on_if0_3.dtsi new file mode 100644 index 00000000000..07d7636c497 --- /dev/null +++ b/boards/arm/nrf9160dk_nrf9160/dts/nrf9160dk_uart1_on_if0_3.dtsi @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&uart1 { + status = "okay"; + tx-pin = <18>; /* <&interface_to_nrf52840 1 0>; */ + rx-pin = <17>; /* <&interface_to_nrf52840 0 0>; */ + rts-pin = <21>; /* <&interface_to_nrf52840 3 0>; */ + cts-pin = <19>; /* <&interface_to_nrf52840 2 0>; */ +}; diff --git a/boards/arm/nrf9160dk_nrf9160/nrf52840_reset.c b/boards/arm/nrf9160dk_nrf9160/nrf52840_reset.c index 3227ec5dfe6..73eda4c3815 100644 --- a/boards/arm/nrf9160dk_nrf9160/nrf52840_reset.c +++ b/boards/arm/nrf9160dk_nrf9160/nrf52840_reset.c @@ -7,38 +7,38 @@ #include #include #include +#include -#define RESET_PIN CONFIG_BOARD_NRF52840_GPIO_RESET_PIN +#define RESET_NODE DT_NODELABEL(nrf52840_reset) -/* Must be a pin from 17 to 23. - * Only those can be connected to the nRF52840. - */ -BUILD_ASSERT(RESET_PIN > 16 && RESET_PIN < 24, - "Selected pin is not connected to nRF52840"); +#if DT_NODE_HAS_STATUS(RESET_NODE, okay) + +#define RESET_GPIO_CTRL DT_GPIO_CTLR(RESET_NODE, gpios) +#define RESET_GPIO_PIN DT_GPIO_PIN(RESET_NODE, gpios) +#define RESET_GPIO_FLAGS DT_GPIO_FLAGS(RESET_NODE, gpios) int bt_hci_transport_setup(const struct device *h4) { int err; char c; - const struct device *port; + const struct device *port = DEVICE_DT_GET(RESET_GPIO_CTRL); - port = device_get_binding(DT_LABEL(DT_NODELABEL(gpio0))); - if (!port) { + if (!device_is_ready(port)) { return -EIO; } - /* Configure pin as output and initialize it to low. */ - err = gpio_pin_configure(port, RESET_PIN, GPIO_OUTPUT_LOW); + /* Configure pin as output and initialize it to inactive state. */ + err = gpio_pin_configure(port, RESET_GPIO_PIN, + RESET_GPIO_FLAGS | GPIO_OUTPUT_INACTIVE); if (err) { return err; } - /* Reset the nRF52840 and let it wait until the pin is - * pulled low again before running to main to ensure - * that it won't send any data until the H4 device - * is setup and ready to receive. + /* Reset the nRF52840 and let it wait until the pin is inactive again + * before running to main to ensure that it won't send any data until + * the H4 device is setup and ready to receive. */ - err = gpio_pin_set(port, RESET_PIN, 1); + err = gpio_pin_set(port, RESET_GPIO_PIN, 1); if (err) { return err; } @@ -56,10 +56,12 @@ int bt_hci_transport_setup(const struct device *h4) } /* We are ready, let the nRF52840 run to main */ - err = gpio_pin_set(port, RESET_PIN, 0); + err = gpio_pin_set(port, RESET_GPIO_PIN, 0); if (err) { return err; } return 0; } + +#endif /* DT_NODE_HAS_STATUS(RESET_NODE, okay) */ diff --git a/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts b/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts index 4f1e17aa9be..9252b8f0e36 100644 --- a/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts +++ b/boards/arm/nrf9160dk_nrf9160/nrf9160dk_nrf9160_common.dts @@ -61,6 +61,32 @@ }; }; + interface_to_nrf52840: gpio-interface { + compatible = "nordic,nrf9160dk-nrf52840-interface"; + #gpio-cells = <2>; + gpio-map-mask = <0xf 0>; + gpio-map-pass-thru = <0 0xffffffff>; + gpio-map = <0 0 &gpio0 17 0>, + <1 0 &gpio0 18 0>, + <2 0 &gpio0 19 0>, + <3 0 &gpio0 21 0>, + <4 0 &gpio0 22 0>, + <5 0 &gpio0 23 0>; + /* 6: COEX0 */ + /* 7: COEX1 */ + /* 8: COEX2 */ + }; + + nrf52840_reset: gpio-reset { + compatible = "nordic,nrf9160dk-nrf52840-reset"; + status = "disabled"; + /* + * This line is specified as active high for compatibility + * with the previously used Kconfig-based configuration. + */ + gpios = <&interface_to_nrf52840 5 GPIO_ACTIVE_HIGH>; + }; + /* These aliases are provided for compatibility with samples */ aliases { led0 = &led0; diff --git a/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.conf b/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.conf index 4991901c5c6..764798d6ef1 100644 --- a/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.conf +++ b/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.conf @@ -2,14 +2,3 @@ CONFIG_CONSOLE=y CONFIG_STDOUT_CONSOLE=y CONFIG_UART_CONSOLE=y - -CONFIG_BT_WAIT_NOP=y - -# Connect the MCU interface pins to the nRF9160 -# We will instantiate UART1 on these pins -CONFIG_BOARD_NRF9160DK_INTERFACE0_MCU=y -CONFIG_BOARD_NRF9160DK_INTERFACE1_MCU=y - -# Enable reset pin on P1.02 -CONFIG_BOARD_NRF9160DK_NRF52840_RESET=y -CONFIG_BOARD_NRF9160DK_NRF52840_RESET_P1_02=y diff --git a/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.overlay b/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.overlay index 63d5847fe94..4209320fcff 100644 --- a/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.overlay +++ b/samples/bluetooth/hci_uart/boards/nrf9160dk_nrf52840.overlay @@ -1,18 +1,20 @@ -/* SPDX-License-Identifier: Apache-2.0 */ +/* + * Copyright (c) 2021 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include + +&uart1 { + current-speed = <1000000>; + hw-flow-control; +}; / { chosen { zephyr,bt-c2h-uart=&uart1; }; }; - -&uart1 { - compatible = "nordic,nrf-uarte"; - current-speed = <1000000>; - status = "okay"; - hw-flow-control; - tx-pin = <17>; - rx-pin = <20>; - rts-pin = <15>; - cts-pin = <22>; -};