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drivers: spi_esp32_spim: Add support for IOMUX mode

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In order to work on a clock speed higher than 20 MHz, IO MUX is required.

Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
This commit is contained in:
XiNGRZ Chan 2022-07-18 16:23:30 +08:00 • committed by Carles Cufí
commit 7109632046
3 changed files with 14 additions and 1 deletions
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3
drivers/spi/spi_esp32_spim.c
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@ -199,7 +199,7 @@ static int IRAM_ATTR spi_esp32_configure(const struct device *dev,
.clock_speed_hz = spi_cfg->frequency, .clock_speed_hz = spi_cfg->frequency,
.duty_cycle = cfg->duty_cycle == 0 ? 128 : cfg->duty_cycle, .duty_cycle = cfg->duty_cycle == 0 ? 128 : cfg->duty_cycle,
.input_delay_ns = cfg->input_delay_ns, .input_delay_ns = cfg->input_delay_ns,
.use_gpio = true .use_gpio = !cfg->use_iomux,
}; };
spi_hal_cal_clock_conf(&timing_param, &freq, &hal_dev->timing_conf); spi_hal_cal_clock_conf(&timing_param, &freq, &hal_dev->timing_conf);
@ -365,6 +365,7 @@ static const struct spi_driver_api spi_api = {
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
.clock_subsys = \ .clock_subsys = \
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(idx, offset), \ (clock_control_subsys_t)DT_INST_CLOCKS_CELL(idx, offset), \
.use_iomux = DT_INST_PROP(idx, use_iomux), \
}; \ }; \
\ \
DEVICE_DT_INST_DEFINE(idx, &spi_esp32_init, \ DEVICE_DT_INST_DEFINE(idx, &spi_esp32_init, \

1
drivers/spi/spi_esp32_spim.h
View file

@ -28,6 +28,7 @@ struct spi_esp32_config {
int irq_source; int irq_source;
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
clock_control_subsys_t clock_subsys; clock_control_subsys_t clock_subsys;
bool use_iomux;
}; };
struct spi_esp32_data { struct spi_esp32_data {

11
dts/bindings/spi/espressif,esp32-spi.yaml
View file

@ -55,3 +55,14 @@ properties:
type: boolean type: boolean
required: false required: false
description: Make CS positive during a transaction instead of negative description: Make CS positive during a transaction instead of negative
use-iomux:
type: boolean
required: false
description: |
Some pins are allowed to bypass the GPIO Matrix and use the IO_MUX
routing mechanism instead, this avoids extra routing latency and makes
possible the use of operating frequencies higher than 20 MHz.
Refer to SoC's Technical Reference Manual to check which pins are
allowed to use this routing path.