boards: seeed: add XIAO ESP32C6 support
This PR adds supports for XIAO ESP32C6 Signed-off-by: Mario Paja <mariopaja@hotmail.com>
This commit is contained in:
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14 changed files with 434 additions and 0 deletions
6
boards/seeed/xiao_esp32c6/Kconfig
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6
boards/seeed/xiao_esp32c6/Kconfig
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# Copyright (c) 2024 Mario Paja
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# SPDX-License-Identifier: Apache-2.0
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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int
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default 4096
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10
boards/seeed/xiao_esp32c6/Kconfig.sysbuild
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10
boards/seeed/xiao_esp32c6/Kconfig.sysbuild
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# Copyright (c) 2024 Mario Paja
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# SPDX-License-Identifier: Apache-2.0
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choice BOOTLOADER
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default BOOTLOADER_MCUBOOT
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endchoice
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choice BOOT_SIGNATURE_TYPE
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default BOOT_SIGNATURE_TYPE_NONE
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endchoice
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7
boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6
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7
boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6
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# XIAO ESP32C6 board configuration
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# Copyright (c) 2024 Mario Paja
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_XIAO_ESP32C6
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select SOC_ESP32_C6_WROOM_1U_N4
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9
boards/seeed/xiao_esp32c6/board.cmake
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9
boards/seeed/xiao_esp32c6/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
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set(OPENOCD OPENOCD-NOTFOUND)
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endif()
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find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
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include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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6
boards/seeed/xiao_esp32c6/board.yml
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6
boards/seeed/xiao_esp32c6/board.yml
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board:
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name: xiao_esp32c6
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full_name: XIAO ESP32C6
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vendor: seeed
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socs:
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- name: esp32c6
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BIN
boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6.webp
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BIN
boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6.webp
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BIN
boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6_pinout.webp
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BIN
boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6_pinout.webp
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After Width: | Height: | Size: 41 KiB |
233
boards/seeed/xiao_esp32c6/doc/index.rst
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233
boards/seeed/xiao_esp32c6/doc/index.rst
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.. zephyr:board:: xiao_esp32c6
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Overview
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********
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Seeed Studio XIAO ESP32C6 is powered by the highly-integrated ESP32-C6 SoC.
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It consists of a high-performance (HP) 32-bit RISC-V processor, which can be clocked up to 160 MHz,
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and a low-power (LP) 32-bit RISC-V processor, which can be clocked up to 20 MHz.
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It has a 320KB ROM, a 512KB SRAM, and works with external flash.
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This board integrates complete Wi-Fi, Bluetooth LE, Zigbee, and Thread functions.
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For more information, check `Seeed Studio XIAO ESP32C6`_ .
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Hardware
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********
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This board is based on the ESP32-C6 with 4MB of flash, integrating 2.4 GHz Wi-Fi 6,
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Bluetooth 5.3 (LE) and the 802.15.4 protocol. It has an USB-C port for programming
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and debugging, integrated battery charging and an U.FL external antenna connector.
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It is based on a standard XIAO 14 pin pinout.
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Supported Features
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==================
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The Zephyr ``xiao_esp32c6`` board target supports the following hardware features:
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+------------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+============+============+=====================================+
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| UART | on-chip | serial port |
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+------------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+------------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+------------+------------+-------------------------------------+
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| USB-JTAG | on-chip | hardware interface |
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+------------+------------+-------------------------------------+
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| SPI Master | on-chip | spi |
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+------------+------------+-------------------------------------+
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| Watchdog | on-chip | watchdog |
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+------------+------------+-------------------------------------+
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| LEDC | on-chip | pwm |
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+------------+------------+-------------------------------------+
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| SPI DMA | on-chip | spi |
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+------------+------------+-------------------------------------+
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| GDMA | on-chip | dma |
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+------------+------------+-------------------------------------+
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| TRNG | on-chip | entropy |
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+------------+------------+-------------------------------------+
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| USB-CDC | on-chip | serial |
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+------------+------------+-------------------------------------+
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| Wi-Fi | on-chip | |
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+------------+------------+-------------------------------------+
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The board uses a standard XIAO pinout, the default pin mapping is the following:
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.. figure:: img/xiao_esp32c6_pinout.webp
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:align: center
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:alt: XIAO ESP32C6 Pinout
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XIAO ESP32C6 Pinout
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System requirements
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*******************
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Prerequisites
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=============
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Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
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below to retrieve those files.
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.. code-block:: console
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west blobs fetch hal_espressif
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.. note::
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It is recommended running the command above after :file:`west update`.
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Building & Flashing
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*******************
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Simple boot
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===========
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The board could be loaded using the single binary image, without 2nd stage bootloader.
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It is the default option when building the application without additional configuration.
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.. note::
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Simple boot does not provide any security features nor OTA updates.
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MCUboot bootloader
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==================
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User may choose to use MCUboot bootloader instead. In that case the bootloader
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must be built (and flashed) at least once.
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There are two options to be used when building an application:
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1. Sysbuild
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2. Manual build
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.. note::
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User can select the MCUboot bootloader by adding the following line
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to the board default configuration file.
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.. code:: cfg
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CONFIG_BOOTLOADER_MCUBOOT=y
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Sysbuild
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========
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The sysbuild makes possible to build and flash all necessary images needed to
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bootstrap the board with the EPS32 SoC.
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To build the sample application using sysbuild use the command:
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.. zephyr-app-commands::
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:tool: west
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:goals: build
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:west-args: --sysbuild
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:compact:
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By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
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images. But it can be configured to create other kind of images.
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Build directory structure created by sysbuild is different from traditional
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Zephyr build. Output is structured by the domain subdirectories:
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.. code-block::
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build/
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├── hello_world
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│ └── zephyr
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│ ├── zephyr.elf
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│ └── zephyr.bin
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├── mcuboot
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│ └── zephyr
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│ ├── zephyr.elf
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│ └── zephyr.bin
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└── domains.yaml
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.. note::
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With ``--sysbuild`` option the bootloader will be re-build and re-flash
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every time the pristine build is used.
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For more information about the system build please read the :ref:`sysbuild` documentation.
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Manual build
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============
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During the development cycle, it is intended to build & flash as quickly possible.
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For that reason, images can be built one at a time using traditional build.
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The instructions following are relevant for both manual build and sysbuild.
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The only difference is the structure of the build directory.
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.. note::
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Remember that bootloader (MCUboot) needs to be flash at least once.
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Build and flash applications as usual (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:goals: build
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The usual ``flash`` target will work with the ``xiao_esp32c6`` board
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configuration. Here is an example for the :zephyr:code-sample:`hello_world`
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application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:goals: flash
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Since the Zephyr console is by default on the ``usb_serial`` device, we use
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the espressif monitor to view.
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.. code-block:: console
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$ west espressif monitor
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After the board has automatically reset and booted, you should see the following
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message in the monitor:
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.. code-block:: console
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***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
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Hello World! xiao_esp32c6/esp32c6
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Debugging
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*********
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As with much custom hardware, the ESP32-C6 modules require patches to
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OpenOCD that are not upstreamed yet. Espressif maintains their own fork of
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the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_.
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The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the
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``-DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>``
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parameter when building.
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Here is an example for building the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:goals: build flash
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:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
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You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: xiao_esp32c6
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:goals: debug
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References
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**********
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.. target-notes::
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.. _`Seeed Studio XIAO ESP32C6`: https://wiki.seeedstudio.com/xiao_esp32c6_getting_started/
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.. _`ESP32-C6 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf
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.. _`ESP32-C6 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf
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.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
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28
boards/seeed/xiao_esp32c6/seeed_xiao_connector.dtsi
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boards/seeed/xiao_esp32c6/seeed_xiao_connector.dtsi
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/*
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* Copyright (c) 2024 Mario Paja
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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xiao_d: connector {
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compatible = "seeed,xiao-gpio";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpio0 0 0>, /* D0 */
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<1 0 &gpio0 1 0>, /* D1 */
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<2 0 &gpio0 2 0>, /* D2 */
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<3 0 &gpio0 21 0>, /* D3 */
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<4 0 &gpio0 22 0>, /* D4 */
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<5 0 &gpio0 23 0>, /* D5 */
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<6 0 &gpio0 16 0>, /* D6 */
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<7 0 &gpio0 17 0>, /* D7 */
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<8 0 &gpio0 19 0>, /* D8 */
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<9 0 &gpio0 20 0>, /* D9 */
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<10 0 &gpio0 18 0>; /* D10 */
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};
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};
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xiao_spi: &spi2 {};
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xiao_serial: &uart0 {};
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4
boards/seeed/xiao_esp32c6/support/openocd.cfg
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4
boards/seeed/xiao_esp32c6/support/openocd.cfg
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# ESP32C6 has built-in JTAG interface over USB port in pins GPIO13/GPIO12 (D-/D+).
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set ESP_RTOS none
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source [find board/esp32c6-builtin.cfg]
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34
boards/seeed/xiao_esp32c6/xiao_esp32c6-pinctrl.dtsi
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34
boards/seeed/xiao_esp32c6/xiao_esp32c6-pinctrl.dtsi
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/*
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* Copyright (c) 2024 Mario Paja
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
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#include <dt-bindings/pinctrl/esp32c6-pinctrl.h>
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#include <zephyr/dt-bindings/pinctrl/esp32c6-gpio-sigmap.h>
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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pinmux = <UART0_TX_GPIO16>;
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output-high;
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};
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group2 {
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pinmux = <UART0_RX_GPIO17>;
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bias-pull-up;
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};
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};
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spim2_default: spim2_default {
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group1 {
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pinmux = <SPIM2_MISO_GPIO20>,
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<SPIM2_SCLK_GPIO19>;
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};
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group2 {
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pinmux = <SPIM2_MOSI_GPIO18>;
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output-low;
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};
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};
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};
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71
boards/seeed/xiao_esp32c6/xiao_esp32c6.dts
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71
boards/seeed/xiao_esp32c6/xiao_esp32c6.dts
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/*
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* Copyright (c) 2024 Mario Paja
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <espressif/esp32c6/esp32c6_wroom_n4.dtsi>
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#include "xiao_esp32c6-pinctrl.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <espressif/partitions_0x0_default.dtsi>
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#include "seeed_xiao_connector.dtsi"
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/ {
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model = "Seeed XIAO ESP32C6";
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compatible = "seeed,xiao-esp32c6";
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &usb_serial;
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zephyr,shell-uart = &usb_serial;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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};
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leds: leds {
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compatible = "gpio-leds";
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yellow_led: led_0 {
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gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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label = "User LED1";
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};
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};
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aliases {
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led0 = &yellow_led;
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watchdog0 = &wdt0;
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};
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};
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&trng0 {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&wdt0 {
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status = "okay";
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};
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&usb_serial {
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status = "okay";
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};
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&spi2 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pinctrl-0 = <&spim2_default>;
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pinctrl-names = "default";
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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19
boards/seeed/xiao_esp32c6/xiao_esp32c6.yaml
Normal file
19
boards/seeed/xiao_esp32c6/xiao_esp32c6.yaml
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identifier: xiao_esp32c6
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name: XIAO ESP32C6
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type: mcu
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arch: riscv
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toolchain:
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- zephyr
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supported:
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- gpio
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- watchdog
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- uart
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- dma
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- spi
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- entropy
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testing:
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ignore_tags:
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- net
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- bluetooth
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- tracing
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vendor: seeed
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7
boards/seeed/xiao_esp32c6/xiao_esp32c6_defconfig
Normal file
7
boards/seeed/xiao_esp32c6/xiao_esp32c6_defconfig
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_MAIN_STACK_SIZE=2048
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CONFIG_CONSOLE=y
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CONFIG_SERIAL=y
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||||
CONFIG_UART_CONSOLE=y
|
||||
CONFIG_GPIO=y
|
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Add table
Add a link
Reference in a new issue