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drivers: spi_k64: Clear RX and TX FIFO before starting transfer

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Clear RX and TX FIFO before starting transfer fixing RX overflow issue
on FRDM K64F board.

Change-Id: I9345a0058a6c7958a6ecf3dc23b99fe7bff18796
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This commit is contained in:
Andrei Emeltchenko 2016-11-25 13:01:05 +02:00 • committed by Maureen Helm
commit 70f4cd4502
1 changed files with 8 additions and 0 deletions
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8
drivers/spi/spi_k64.c
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@ -575,6 +575,7 @@ static int spi_k64_transceive(struct device *dev,
const struct spi_k64_config *info = dev->config->config_info;
struct spi_k64_data *spi_data = dev->driver_data;
uint32_t int_config; /* interrupt configuration */
uint32_t mcr;
SYS_LOG_DBG("dev %p, txbuf %p txlen %u rxbuf %p rxlen %u",
dev, tx_buf, tx_buf_len, rx_buf, rx_buf_len);
@ -594,6 +595,13 @@ static int spi_k64_transceive(struct device *dev,
return -EBUSY;
}
/**
* Clear RX and TX FIFO
*/
mcr = sys_read32(info->regs + SPI_K64_REG_MCR);
mcr |= (SPI_K64_MCR_CLR_RXF | SPI_K64_MCR_CLR_TXF);
sys_write32(mcr, (info->regs + SPI_K64_REG_MCR));
/* Set buffers info */
spi_data->tx_buf = tx_buf;
spi_data->tx_buf_len = tx_buf_len;