drivers: spi_k64: Clear RX and TX FIFO before starting transfer
Clear RX and TX FIFO before starting transfer fixing RX overflow issue on FRDM K64F board. Change-Id: I9345a0058a6c7958a6ecf3dc23b99fe7bff18796 Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
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1 changed files with 8 additions and 0 deletions
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@ -575,6 +575,7 @@ static int spi_k64_transceive(struct device *dev,
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const struct spi_k64_config *info = dev->config->config_info;
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struct spi_k64_data *spi_data = dev->driver_data;
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uint32_t int_config; /* interrupt configuration */
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uint32_t mcr;
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SYS_LOG_DBG("dev %p, txbuf %p txlen %u rxbuf %p rxlen %u",
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dev, tx_buf, tx_buf_len, rx_buf, rx_buf_len);
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@ -594,6 +595,13 @@ static int spi_k64_transceive(struct device *dev,
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return -EBUSY;
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}
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/**
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* Clear RX and TX FIFO
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*/
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mcr = sys_read32(info->regs + SPI_K64_REG_MCR);
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mcr |= (SPI_K64_MCR_CLR_RXF | SPI_K64_MCR_CLR_TXF);
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sys_write32(mcr, (info->regs + SPI_K64_REG_MCR));
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/* Set buffers info */
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spi_data->tx_buf = tx_buf;
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spi_data->tx_buf_len = tx_buf_len;
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