From 70ea3b115dc2d478afee43b7442acebebba6eebe Mon Sep 17 00:00:00 2001 From: Sven Ginka Date: Mon, 5 May 2025 13:13:50 +0200 Subject: [PATCH] drivers: pinctrl: added slew-rate setting for the sy1xx soc With this commit we have the option to set the pad slew-rates for all available pins on the soc. Signed-off-by: Sven Ginka --- dts/bindings/pinctrl/sensry,sy1xx-pinctrl.yaml | 16 ++++++++++++++++ soc/sensry/ganymed/sy1xx/common/pinctrl_soc.h | 1 + 2 files changed, 17 insertions(+) diff --git a/dts/bindings/pinctrl/sensry,sy1xx-pinctrl.yaml b/dts/bindings/pinctrl/sensry,sy1xx-pinctrl.yaml index 8bf582bd876..b7c8a521ce3 100644 --- a/dts/bindings/pinctrl/sensry,sy1xx-pinctrl.yaml +++ b/dts/bindings/pinctrl/sensry,sy1xx-pinctrl.yaml @@ -74,3 +74,19 @@ child-binding: description: | Pin mux selection. See the SOC level pinctrl header for a defined list of these options. + + slew-rate: + type: int + enum: + - 0 # 2pF + - 1 # 4pF + - 2 # 8pF + - 3 # 16pF + default: 0 + description: | + Selects the output drive strength. Choices represent approximate capacitive load. + The default corresponds to the reset value of the register field. + - 0.. 2pF, Weakest drive + - 1.. 4pF, Low drive + - 2.. 8pF, Medium drive + - 3.. 16pF, Strongest drive diff --git a/soc/sensry/ganymed/sy1xx/common/pinctrl_soc.h b/soc/sensry/ganymed/sy1xx/common/pinctrl_soc.h index 5a124fa0783..6fdcf2483ba 100644 --- a/soc/sensry/ganymed/sy1xx/common/pinctrl_soc.h +++ b/soc/sensry/ganymed/sy1xx/common/pinctrl_soc.h @@ -45,6 +45,7 @@ typedef struct { (SY1XX_PULL_UP_ENABLE * DT_PROP(node, bias_pull_up)) << SY1XX_PAD_PULL_UP_OFFS | \ (SY1XX_PULL_DOWN_ENABLE * DT_PROP(node, bias_pull_down)) \ << SY1XX_PAD_PULL_DOWN_OFFS | \ + (DT_PROP(node, slew_rate) << SY1XX_PAD_DRIVE_OFFS) | \ (SY1XX_TRISTATE_ENABLE * DT_PROP(node, bias_high_impedance)) \ << SY1XX_PAD_TRISTATE_OFFS | \ (SY1XX_OUTPUT_ENABLE & (1 - DT_PROP(node, input_enable))) << SY1XX_PAD_DIR_OFFS \